Service manual

Schematic Diagrams
Penryn 1/2 B - 3
B.Schematic Diagrams
Penryn 1/2
3. 3V S
V_THRM
1.05VS
1.05VS
3. 3 V
VD D3
CPU_GTLREF2
CLK_CPU_BCLK# 18
H _D#[63:0]4
H_DBSY# 4
H_ F E RR #13
C PU_BS EL24,18
H_HIT# 4
H_AD STB#04
H_D STBP# 04
H_DSTBN#2 4
H _D#[63:0] 4
H_DRDY# 4
P M _ TH R M T R I P # 5, 13
H_A#[35:3]4
H_DPRSTP# 5,13,35
H_RS#1 4
H _D#[63:0]4
SMC _THER M 3,22
H_A20M#13
H _DSTBP# 3 4H_D STBP# 14
H_RS#2 4
H_ ST PC L K#13
H_A#[35:3]4
H_ N MI13
H_DSTBN#3 4
H_ADS# 4
H_DSTBN#14
H_HITM# 4
PS I# 35
CLK_CPU_BCLK 18
H_PWRGD 13
H_INIT# 13
H_AD STB#14
H_LOCK# 4
H_CPUSLP# 4
H_IGNNE#13
H _ RE Q# [4 :0 ]4
H_DINV#3 4
H_RS#0 4
H _D#[63:0] 4
H_DINV#2 4
PM_ TH RM # 3, 15,22
H_DEFER# 4
C PU_BS EL04,18
H_DPW R# 4
H_DSTBN#04
H_SMI#13
H_BNR# 4
H_TRDY# 4
H_BPRI# 4
C PU_BS EL14,18
SMD _THER M 3,22
H _DSTBP# 2 4
H_DINV#04
H_DPSLP# 13
TH ERM _RST#22
H_CPURST# 4
H_INTR13
H_BR0# 4
H_DINV#14
3.3V14,15,16,19,21,28,29,30, 31,32,34,36,37,38
3.3VS3,5,9,12,13,14,15,16,19,20,21,22,23,24, 25,28,30,33,35,37
1.05V S3,4,9,13,16,23,32
VD D33,4,13,22,23, 24,29,33,34,37,38
H_ T H RM DA_ 23
H_ T H RM DC _23
H_ T DO _M3
H_ T DI_ M3
V_THR M _R 3,15,22
PM _TH R M#_R 3
ITP_ D BRST#
COMP1
H_ D # 21
H_A#7
H_TDI_M
H_D#40
H_D#62
H_A#34
H_D#52
H_D#35
H_A#10
H_BPM3#
H _ BPM 2_ 0 #
H_A#20
H_A#33
H_A#16
H_ D # 4
H_A#28
H_A#9
H_D#43
H_ D # 29
H_REQ#1
H_A#26
H_A#17
CO MP 3
H_TRST#
H_THERMDC
H_TRST#
COMP0
H_D#56
H_ D # 18
H_A#29
H_REQ#2
H_TDI
H_D#39
CO MP 1
H_D#61
H_D#34
H_D#51
H_D#47
H_D#42H_ D # 10
H_A#19
CP U_ TEST 4
H_BPM2#
H_A#24
H_A#32
H_ D # 31
H_ D # 12
H_ D # 13
H_A#4
Z0210
H_THERMDA
H_THERMDC
H _ BPM 2_ 1 #
H_A#23
H_PREQ#
H_TMS
H_A#30
H_ D # 19
H_A#6
H_TMS
H_D#55
H_A#12
H_A#11
H_ D # 25
COMP3
H_D#38
H_D#60
Z0212
TH E R M _ R S T #
H_D#33
H_D#50
H_ D # 7
H_TCK
H_ D # 27
H_ D # 0
H_ D # 9
H_IERR#
H_A#5
H_ D # 5
H_THERMDA
H_D#46
H_BPM1#
H_A#25
H_TDO
Z0211
H_A#27
H_ D # 20
H_A#13
H_A#8
H_TDO_M
CPU_GTLREF
H_TDI
H_A#15
CO MP 2
H_ D # 22
H_PROCHOT#
H_D#37
CP U_ TEST 1
Z0214
H_D#59
H_D#32
H_ D # 23
H_D#49
H_ D # 2
H_REQ#4
H_D#54
H_PREQ#
H_ D # 1
H_ D # 14
H_PROCHOT#
H_ D # 15
H_BPM0#
H_D#45
H_D#41
H_ D # 30
H_ D # 24
H_REQ#3
H_ D # 8
H_A#22
H_A#3
H_ D # 26
H_TCK
COMP2
H_D#58
H_A#21
H_ D # 16
H_D#63
H_D#48
H_ D # 11
H_A#31
H_IERR#
H_D#53
H_A#35
H_D#36
H_PRDY#
CP U_ TEST 2
Z0206
H_A#18
CO MP 0
H_D#57
H_ D # 3
H_D#44
H_ D # 28
H_ D # 17
H_REQ#0
H_ D # 6
H_A#14
ITP_DBRST#
Z0215
Z0216
Z0213
H _ BPM 2_ 2 #
C 541 * 0.1u_16V_04
ADDR GROUP_ 0
ADDR GROUP_1
CONTROL
XDP/ITP SIGNALS
H CLK
TH ERMA L
RESERVED
IC H
U26A
Penryn
N3
P5
P2
L2
P4
P1
R1
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
J4
U2
V4
M4
N5
T2
V3
B2
D2
D22
L5
L4
K5
M3
N2
J1
A6
H1
M1
V1
D3
A22
A21
E2
AD 4
AD 3
AD 1
AC 4
G5
F1
C20
E1
H5
F21
A5
G6
E4
D20
C4
B3
C6
B4
H4
AC 2
AC 1
D21
K3
H2
K2
J3
L1
C1
F3
F4
G3
A3
D5
AC 5
AA6
AB3
C7
A24
B25
AB5
G2
AB6
W3
AA 4
AB 2
AA 3
F6
A[10 ]#
A[11 ]#
A[12 ]#
A[13 ]#
A[14 ]#
A[15 ]#
A[16 ]#
A[17 ]#
A[18 ]#
A[19 ]#
A[20 ]#
A[21 ]#
A[22 ]#
A[23 ]#
A[24 ]#
A[25 ]#
A[26 ]#
A[27 ]#
A[28 ]#
A[29 ]#
A[3]#
A[30 ]#
A[31 ]#
RS V D[0 1]
RS V D[0 2]
RS V D[0 3]
RS V D[0 4]
RS V D[0 5]
RS V D[0 6]
RS V D[0 7]
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A20M#
AD S#
AD STB[0]#
AD STB[1]#
RS V D[0 8]
BC LK[0]
BC LK[1]
BNR #
BPM [0]#
BPM [1]#
BPM [2]#
BPM [3]#
BPR I#
BR0#
DBR #
DBSY #
DEFER#
DR DY #
FER R#
HIT#
HITM#
IERR #
IGNNE#
INIT#
LINT0
LINT1
LOC K#
PR DY #
PREQ #
PR O CH OT#
RE Q[0 ]#
RE Q[1 ]#
RE Q[2 ]#
RE Q[3 ]#
RE Q[4 ]#
R ESET#
R S[0 ]#
R S[1 ]#
R S[2 ]#
SM I#
STPC LK #
TC K
TD I
TDO
THER MTR IP#
TH ER MD A
THE RM DC
TM S
TR D Y #
TR S T #
A[32 ]#
A[33 ]#
A[34 ]#
A[35 ]#
RS V D[0 9]
C5 3 9
*10U_10V_08
R4 4 5
54.9_1%_04
R461 56_04
U2 3
aSC7525
1
2
3
4
5
6
7
8
VDD
D+
D-
TH E R M
GN D
ALERT
SD ATA
SCLK
R452
27. 4_1%_04
R456 54.9_1% _04
R457 54.9_1% _04
C53 8
1 0 00 p _ 5 0V _0 4
R43 4
27.4_1% _04
R4 36
54.9_1% _04
R453 54.9_1% _04
R375
*1 0 K_ 0 4
R3 7 8
4.7K _04
R387
*100K_04
R 390 *0_06
R458 54.9_1% _04
R25 56_04
C647 *0.1u_X7R _04
C5 3 5
*0.1u_16V _04
Q4 5
*AO 3 40 9
G
DS
R27 1K_ 04
R377
4. 7 K _ 0 4
C5 2 7
*0.1u_16V_04
R3 9 9
*2 0 K_ 0 4
R463
2K_1%_04
R80 56_04
DATA GRP 0
DATA GRP 1
DA T A GRP 2DA T A GRP 3
MIS C
U2 6B
Penry n
R26
U26
AA1
Y1
E22
F24
J2 4
J2 3
H22
F26
K22
H23
N22
K25
P26
R23
E26
L2 3
M2 4
L2 2
M2 3
P25
P23
P22
T2 4
R24
L2 5
G2 2
T2 5
N25
Y22
AB24
V24
V26
V23
T22
U25
U23
F23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
AE24
AD 24
G2 5
AA21
AB22
AB21
AC 26
AD 20
AE22
AF23
AC 25
AE21
AD 21
E25
AC 22
AD 23
AF22
AC 23
E23
K24
G2 4
AF1
H25
N24
U22
AC 20
E5
B5
D24
J2 6
L2 6
Y26
AE25
H26
M2 6
AA26
AF24
AD26
AE6
D6
D7
C24
B22
B23
C21
D25
AF2 6
A26
C23
C3
CO MP [0]
CO MP [1]
CO MP [2]
CO MP [3]
D[0]#
D[1]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
D[16]#
D[17]#
D[18]#
D[19]#
D[2]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[3]#
D[30]#
D[31]#
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[4]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
D[48]#
D[49]#
D[5]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[6]#
D[60]#
D[61]#
D[62]#
D[63]#
D[7]#
D[8]#
D[9]#
TEST5
D INV [0 ]#
D INV [1 ]#
DINV[2]#
DINV[3]#
DPRSTP#
DP SL P#
DPWR#
DSTBN[0]#
DSTBN[1]#
DSTBN[2]#
DSTBN[3]#
DSTBP[0]#
DSTBP[1]#
DS TB P[2 ]#
DS TB P[3 ]#
GTLREF
PS I#
PWRGOOD
SLP#
TEST3
B SEL[0]
B SEL[1]
B SEL[2]
TEST2
TEST4
TEST6
TEST1
TEST7
R3 8 0 * 0_0 4
R405 *1K_04
R382
*0_04
R 462 1K_1%_04
R388
*0_06
R68 *1K_04
R383
*10K_04
Q1 3
*2 N 70 0 2
G
DS
R3 9 6
* 100K_04
Layout Note:
Within 2.0"
of the CPU
If PROCHOT# is routed between CPU, IMVP and MCH,
pull-up resistor has to be 75 ohm ? 5%. If not
use, pull-up resistor has to be 58 ohm ? 5%
10mils
Route H_THERMDA and
H_THERMDC on same layer.
10 mil trace on 10 mil spacing.
Near to Thermal IC
Layout note:
Zo=55 ohm, 0.5"max
for GTLREF
Layout Note:
Layout note:
Layout Note:
COMP0, COMP2: 0.5" Max, Zo=27.4 Ohms
COMP1, COMP3: 0.5" Max, Zo=55 Ohms
Best estimate is 18 mils wide trace for outer
layers and 14 mils wide trace if on internal
layers.
H_ TD I
Ci rc ul t: 5 4 .9 o hm c he c k 15 0 oh m
AD M1 0 31 SM bu s = 98 h
G 78 1 -1 SM bu s = 4D h
? ? ? VGA? ? thermal IC ? ? ? ?
2007/3/2
EVT
2007/12/10
Sheet 2 of 42
Penryn 1/2