Service manual

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CORE LOGIC CHIPSET - INTEL 440ZX-M/440BX AGPSET
The Intel 440ZX-M/BX AGPset consists of the BX System Controller (443ZX-M/443BX) and the PCI ISA IDE
Xcelerator (PIIX4E). The AGPset forms a Host-to-PCI bridge and provides the second level cache control and a full
function 64-bit data path to main memory.
NORTH BRIDGE, AGPSET SYSTEM CONTROLLER, 82443ZX-M/82443BX
The BX System Controller (443ZX-M/BX) integrates the cache and main memory DRAM control functions and
provides bus control to transfer between the CPU, cache, main memory, AGP bus and the PCI Bus.
Features
• Supports the Pentium II processor family host bus at 100MHz and 66 MHz at 3.3V
• PCI 2.1 compliant
• Integrated Data Path
• Integrated DRAM controller
- 8Mbytes to 256Mbytes main memory
- 64Mbit DRAM/SDRAM technology support
- EDO and SDRAM DRAM support
- Integrated programmable-strength for DRAM interface
- CAS-Before-RAS refresh, extended CBR and self refresh for EDO
- CAS-Before-RAS and self refresh for SDRAM
• Fully synchronous, minimum latency 30/33 MHz PCI bus interface
- Five PCI bus masters (including PIIX4)
- 10 DWord PCI-to-DRAM read prefetch buffer
- 18 DWord PCI-DRAM post buffer
- Multi-Transaction timer to support multiple short PCI transactions
• AGP Features
- AGP 1.0 compliant
- 66/133 MHz data transfer capability
- Supports concurrent CPU, AGP and PCI transactions
• Power Management Features
- Dynamic stop clock support
- Suspend to RAM (STR)
- Suspend to Disk (STD)
- Power On Suspend (POS)
- Internal clock control
- SDRAM and EDO self refresh during suspend
- ACPI support
- Compatible SMRAM (C_SMRAM) and Extended SMRAM (E_SMRAM)
- SMM write-back cacheable in E_SMRAM mode up to 1MB
• Supports the Universal Serial Bus (USB)
• 492 Pin BGA 440BX AGPset with integrated data paths
core logic chipset