Service manual

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Chipset
CPU - INTEL MOBILE PENTIUM III/CELERON
The Notebook uses the Intel Mobile Pentium III/Celeron processor in a microPGA2 package. The Intel Mobile
Pentium III/Celeron processor features an integrated L2 cache (256KB for Pentium III and 128KB for Celeron) and
a 64-bit high performance system bus.
The Mobile Pentium III/Celeron processor’s 64-bit wide Low Power Gunning Transceiver Logic system bus is
compatible with the 440BX AGPSet and provides a glue-less, point-to-point interface for an I/O bridge/memory
controller.
The Intel Mobile Pentium III and Celeron processors are fully compatible with all software written for the Pentium
processor with MMX technology, Pentium processor, Intel486 microprocessor, and Intel386 microprocessor. In
addition, they provide improved multimedia & communications performance. They feature:
• Performance improved over existing mobile processors
- Supports the Intel Architecture with Dynamic Execution
- Supports the Intel Architecture MMX technology
• Integrated primary (L1) instructions and data caches
- 4-way set associative, 32-byte line size, 1 line per sector
- 16-Kbyte instruction cache and 16-Kbyte writeback data cache
- Cacheable range programmable by processor programmable registers
• Integrated second level (L2) cache
- 4-way set associative, 32-byte line size, 1 line per sector
- Operated at full core speed
- 256-Kbyte, ECC protected cache data array
• Low Power GTL+ system bus interface
- 64-bit data bus, 66-MHz operation
- Uniprocessor, two loads only (processor and I/O bridge/memory controller)
- Short trace length and low capacitance allows for single ended termination
• Voltage reduction technology
• Pentium II processor clock control
- Quick Start for low power, low exit latency clock “throttling”
- Deep Sleep mode for extremely low power dissipation
• Thermal diode for measuring processor temperature
CPU