Service manual

1
2
3
4
5
B
C
B – 2
Diagrams
B
MAINBOARD
MAINBOARD
CPU:PENTIUM III
REV. 2
(DIAGRAM 1 OF 2)
FIG. B  1
+3VS +3VH8
+3VS
+V_CMOSREF+V_CLKREF
VCCT
VCCT
VCCT
CPUVCC
+2.5VS
VCCT
+3VS
VCCT
+V_GTLREF
+3VS
VCCT
KB _SM DAT A 20,23
KB_SMCLK 20,23
GT L_HA#[3..35]7
GT L_HREQ#[0..4]7
GT L_ADS#7
GT L_BREQ0#7
GT L_BPRI#7
GT L_BNR#7
GT L_HLOCK#7
GT L_HIT #7
GT L_HIT M#7
GT L_DEFER#7
GT L_RS#[0..2]7
GT L_HT RDY #7
A20M#14
IGNNE#14
G_SMI#3
G_CPUPWRGD3
G_ST PCLK#3
G_INTR3
G_NMI3
G_INIT #3
GT L_CPURST#3,7
HCLK _CPU7,13
GT L_HD#[0..63] 7
GT L_DBSY# 7
G T L_DRDY # 7
CPU_T CK3
CPU_T DI3
CPU_T MS3
CPU_T RST#3
CPU_P REQ #3
CPU_T DO3
GT L_PRDY#3
GHI#3
FERR# 14
CP U_T HERM# 15
G_VR_HI /LO#3,4
THERMDA
THERMDC
STBY#
KB_SMCLK
KB_SM DAT A
CPU_F ERR#
CPU_I ERR#
CPU_F LUS H#
CPU_SLP#
G_SMI#
G_ST PCLK#
G_INIT #
CPU_P REQ #
G_CPUPWRGD
GT L_HA#3
GT L_HA#4
GT L_HA#5
GT L_HA#6
GT L_HA#7
GT L_HA#8
GT L_HA#9
GT L_HA#10
GT L_HA#11
GT L_HA#12
GT L_HA#13
GT L_HA#14
GT L_HA#15
GT L_HA#16
GT L_HA#17
GT L_HA#18
GT L_HA#19
GT L_HA#20
GT L_HA#21
GT L_HA#22
GT L_HA#23
GT L_HA#24
GT L_HA#25
GT L_HA#26
GT L_HA#27
GT L_HA#28
GT L_HA#29
GT L_HA#30
GT L_HA#31
GT L_HA#32
GT L_HA#33
GT L_HA#34
GT L_HA#35
GT L_HREQ#0
GT L_HREQ#1
GT L_HREQ#2
GT L_HREQ#3
GT L_HREQ#4
CPU_I ERR#
GT L_RS#0
GT L_RS#1
GT L_RS#2
CPU_F ERR#
CPU_F LUS H#
CPU_SLP#
GT L_HD#0
GT L_HD#1
GT L_HD#2
GT L_HD#3
GT L_HD#4
GT L_HD#5
GT L_HD#6
GT L_HD#7
GT L_HD#8
GT L_HD#9
GT L_HD#10
GT L_HD#11
GT L_HD#12
GT L_HD#13
GT L_HD#14
GT L_HD#15
GT L_HD#16
GT L_HD#17
GT L_HD#18
GT L_HD#19
GT L_HD#20
GT L_HD#21
GT L_HD#22
GT L_HD#23
GT L_HD#24
GT L_HD#25
GT L_HD#26
GT L_HD#27
GT L_HD#28
GT L_HD#29
GT L_HD#30
GT L_HD#31
GT L_HD#32
GT L_HD#33
GT L_HD#34
GT L_HD#35
GT L_HD#36
GT L_HD#37
GT L_HD#38
GT L_HD#39
GT L_HD#40
GT L_HD#41
GT L_HD#42
GT L_HD#43
GT L_HD#44
GT L_HD#45
GT L_HD#46
GT L_HD#47
GT L_HD#48
GT L_HD#49
GT L_HD#50
GT L_HD#51
GT L_HD#52
GT L_HD#53
GT L_HD#54
GT L_HD#55
GT L_HD#56
GT L_HD#57
GT L_HD#58
GT L_HD#59
GT L_HD#60
GT L_HD#61
GT L_HD#62
GT L_HD#63
THERMDA
THERMDC
BSEL0
BSEL1
A20M#
IGNNE#
G_NMI
G_INTR
CPU_F ERR#
GT L_CPURST#
U33
MAX1617/AD1021
1
5
15
9
13
2
16
123
14
4
11
10
6
7
8
N/C1
N/C2
STBY#
N/C3
N/C4
VCC
N/C5
SMBDAT ADXP
SMBCLK
DXN
ALERT #
ADD0
ADD1
GND1
GND2
R292
1K
R315
10K
R314
10K
R317
1K
R308
10K
R61
1.5K
R72
1.5K
R288
1.5K
R71
27 0
R63
68 0
R66 1K
R62
1.5K
R47
1.5K
R304
1.5K
C427
.1UF
C418
2200PF
R64 1.5 K
R59 110, 1%
R46 1K
C81
0.1U
C67
0.1U
C83
0.1U
C112
0.1U
C111
0.1U
C110
0.1U
R49
56.2 1%
R57 1.5 K
R90
1K
T187
T188
T189
T190
R94 1
L1 5
BK1608HS330
1 2
+
C434
33uF/8V
12
T191
R58
0
R70 1. 5K
R89 1K
R56
1.5K
R48
1.5K
Q14
2N3904
B
E C
R77
1K
R88
10K
R69
56
R316
10K
R60
1.5K
R302
10
C422
10PF
D ATA PH ASE SIGNALS
ADDRESS LINES
REQUEST PHASE
SI GNALS
E RRO R
SI GNALS
ARBIT RAT ION
PHASE SIGNALS
SNOO P PHASE
SI GNALS
RESP ONSE
PHASE SIGNALS
ECMPAT IB ILIT Y
( GTL+ )
( GTL+ )
( GTL+ )
( GTL+ )
( GTL+ )
( GTL+ )
( GTL+ )
U8A
coppermine
T21
U21
R21
V18
P21
P20
U19
AA3
T1
AA15
AB16
AA12
AB15
AA16
D10
D11
C7
C8
B9
A9
C10
B11
C12
B13
A14
B12
E12
B16
A13
D13
D15
D12
B14
E14
C13
A19
B17
A18
C17
D17
C18
B19
D18
B20
A20
B21
D19
C21
E18
C20
F19
D20
D21
H18
F18
J1 8
F21
E20
H19
E21
J2 0
H21
L1 8
G20
P18
G21
K18
K21
M18
L2 1
R19
K19
T20
J2 1
L2 0
M19
U18
R18
V20
W2
AB2
AC12
AC9
AC13
AB10
V5
AC11
AB12
L3
K3
J2
L4
L1
K5
K1
J1
J3
K4
G1
H1
E4
F1
F4
F2
E1
C4
D3
D1
E2
D5
D4
C3
C1
B3
A3
B2
C2
A4
A5
B4
C5
T2
V4
V2
W3
W5
AB18
AC19
AA10
A6
M3
AD10
U1
AA2
W1
Y1
U2
V1
Y4
U3
C6
U4
T4
R1
AA1
AB1
Y2
E6
V21
AD9
DEP1 #
DEP2 #
DEP3 #
DEP4 #
DEP5 #
DEP6 #
DEP7 #
DBSY #
DRDY #
THERMDA
THERMDC
SELPSB0
SELPSB1
EDGECT RLP
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DEP0 #
RP#
ADS#
FE RR#
FLUS H#
IGNNE#
SMI#
PWRGO OD
ST PCLK#
SLP#
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
REQ0 #
REQ1 #
REQ2 #
REQ3 #
REQ4 #
INTR/LINT0
NMI / LI NT 1
INI T #
RESET #
BCLK
A20M#
RS0#
RS1#
RS2#
RSP#
TRDY#
HI T #
HI T M#
DEF ER#
BREQ0#
BPRI#
BNR#
LOCK#
AE RR#
AP0#
AP1#
BE RR#
BINIT #
IERR#
R408 300
D37 1N4148
1 2
C533 2.2UF
R406 0
C372
0.1U
API C
DEBUG
BREAK
POI NT
T EST ACCESS
PORT / ITP
GEY SERVILLE
VT T REF
CM OS T EST
VCC
INPUT
( GTL+ )
( GTL+ )
PLL ANALOG
VOLT AGE
U8B
coppermine
H8
H10
H12
H14
H16
J7
J9
J1 1
J1 3
J1 5
K8
K10
K12
K14
K16
L7
L9
L1 1
L1 3
L1 5
M8
M10
M12
M14
M16
N7
N9
N11
N13
N15
P8
P10
P12
P14
P16
R7
R9
R11
R13
R15
T8
T10
T12
T14
T16
U7
U9
U11
U13
U15
P2
AA9
AD18
R2
AB21
Y20
Y21
W2 1
W1 9
AA11
AD13
AC15
AD14
AA14
AB20
W2 0
L2
M2
E5
E16
E17
F5
F17
U5
Y17
Y18
AD17
Y5
N5
AD20
H4
AA17
G4
AD19
AB19
AA21
AA18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
CLKREF
CMOSREF_1
CMOSREF_2
GHI#
PICD0
PICD1
BP3#
BPM0#
BPM1#
TCK
TDI
TDO
TMS
TRST#
PREQ#
PRDY#
VCCA
VSSA
VREF_0
VREF_1
VREF_2
VREF_3
VREF_4
VREF_5
VREF_6
VREF_7
T EST HI
TESTLO1
TESTLO2
T EST P_1
T EST P_2
T EST P_3
T EST P_4
RT T IM PEDP
RSVD
BP2#
P ICCLK
C369
0.1U
C409
0.1U
Q44
*B S S 138
G
DS
R407
*1 K
CPU Sideband Pull-ups
S
D
GE
C
B
Equal length with KB
_
SMDATA & KB
_
SMCLK
1133 MHZ
0
0
System Bus Frequ ency
Reserv ed
1
BSEL0
0
100 M H Z
1
BSEL1
66 M HZ
0
1
CPU