User`s manual

BD2-1220/1221 User’s Manual
15
6.4 Timing Chart (Compatibility Mode)
Data input and print timing
6.5 Data Reception Control
When the Busy signal is at “LOW”, the control board can receive data from the host computer, but when at
“HIGH”, data reception is not possible.
6.6 Buffering
Since the control board can buffer 4K bytes of data, the host computer is immediately made free.
POWER
DATA
BUSY
STB
ACK
T2
T1 T3
T6
T4
T5
T1, T2, T3
T4
T5
T6
: 0.5 µs MIN
: 270 ns MAX
: 2.3 µs TYP
:500 ms MIN (At power-on)