User Manual
Table Of Contents
- AD-1192 Instruction cover.pdf
- AD-1192 Instruction Manual.pdf
- AD-1192 Instruction cover.pdf
- AD-1192 Instruction Manual.pdf
- WEEE MARK
- CE Marking Declaration of Conformity
- FCC Declaration of Conformity
- Compliance Statements
- SAFETY PRECAUTIONS
- THE TABLE OF CONTENTS
- 1. INTRODUCTION
- 2. TYPE CLASSIFICATIONS
- 3. EXTERNAL APPEARANCE AND PART DESCRIPTIONS
- 4. OPERATIONS
- 5. PARALLEL INTERFACE
- 6. SERIAL INTERFACE
- 7. DIP SWITCH SETTING
- 8. PRINT CONTROL FUNCTION
- 9. CHARACTER CODE TABLE
- 9.1 ASCII + 910 Emulation (International)
- 9.2 910 Emulation (Japan)
- 9.3 Codepage PC437 (USA, Standard Europe)
- 9.4 Katakana
- 9.5 Codepage PC858 (Multilingual)
- 9.6 Codepage PC860 (Portuguese)
- 9.7 Codepage PC863 (Canadian-French)
- 9.8 Codepage PC865 (Nordic)
- 9.9 Codepage PC852 (Eastern Europe)
- 9.10 Codepage PC866 (Russian)
- 9.11 Codepage PC857 (Turkish)
- 9.12 Codepage WPC1252 (Windows Latin1)
- 9.13 Codepage PC864 (Arabic)
- 9.14 Codepage PC869 (Greek)
- 9.15 International Character Code Table
- 10. EXTERNAL DIMENSIONS
— 24 —
POWER
DATA
STB
T1
DATA DATA DATA
T2
BUSY
ACK
T3
T1: 1.6 µs MIN
T2: 500 µS MIN
T3: 10 µs TYP
T4: 5 µs TYP
T5: 5 µS TYP
5.3 Description of Input/Output Signals
(1) Input signal
• DATA 1 to DATA 8 . . . 8 bit parallel signal (positive logic)
• STB . . . Strobe signal for reading out data (negative logic)
• RESET . . . Signal for resetting the entire unit (negative logic 4 ms or more)
(2) Output signal
• ACK . . . 8 bit data signal for requesting data. ACK is issued at the end of the
BUSY signal (negative logic)
• BUSY . . . Signal indicating the printer is busy. Input new data when the signal
is in “LOW” condition (positive logic)
• SELECT . . . Signal to indicate this equipment is in the SELECT (ready for
communication) state (positive logic)
“LO”is output in the state deselected by the operation panel (SEL-
SW), mechanical error, or memory error.
• P.N.E. . . . Signal to be output for paper-near-end
(3) Other
• GND . . . Ground commonly used in the circuit
• FRAME GND . . . Frame ground (case ground)
(4) Timing chart
Busy signal timing: Clear timing can be selected by the memory switch.
ACK signal timing: The following kinds of timing can be selected by the memory
switch setting.
BUSY
ACK
T4
BUSY
ACK
BUSY
Before
Center
After
ACK
T5