Specifications
5-2
Cisco XR 12000 Series Router SIP and SPA Software Configuration Guide, Release 3.2
Release 3.2, OL-6396-01, Rev.A1 January 9, 2006
Chapter 5 Overview of Packet over SONET SPAs
Supported Features
Although the default HA mode is Stateful Switchover (SSO) on a Cisco XR 12000 Series Router,
the router automatically falls back to RPR mode for unsupported devices. Therefore, RPR is used
with the SIP on a Cisco XR 12000 Series Router, and no additional configuration is required to
implement HA with a SIP on a Cisco XR 12000 Series Router.
More information about HA on the Cisco 7304 router can be found at the following URL:
http://www.cisco.com/univercd/cc/td/doc/product/software/ios122s/122snwft/release/122s18/12e_
rpr.htm
• Field Programmable Gate Array (FPGA) upgrade support
The Cisco 12000 SIP-600 supports the standard FPGA upgrade methods for the Cisco XR 12000
Series Router. For more information about FPGA support, see Chapter 7, “Upgrading
Field-Programmable Devices.”
• Hot Standby Router Protocol (HSRP) and Virtual Router Redundancy Protocol (VRRP) support
• NetFlow switching
• QoS features supported by the NSE-100 and NPE-G100
• Network-Based Application Recognition (NBAR) with the NPE-G100
• Access control lists (ACLs)
• IPv4 and PCv6 support.
1-Port OC-192c/STM-64 POS/RPR XFP SPA Features
The following is a list of some of the significant hardware and software features supported by the 1-Port
OC-192c/STM-64 POS/RPR XFP SPA:
• Terminates and generates SONET/SDH section, line, and path overheads
• Supports HDLC/PPP framed packets
• Packet mapping conforms to RFC 1619 and RFC 1662 for Packet-over-SONET applications
• Internal buffering to absorb short bursts of data traffic at the bus interface
• IPv4 and IPv6 support
• Counter and alarm capabilities for management support
• Local (internal) and external loopback
• Per interface port counters
• Multiprotocol label switching (MPLS)
• Simple Network Management Protocol (SNMP) Management Information Base (MIB) counters
• Field Programmable Gate Array (FPGA) upgrade support