Specifications

5-9
Cisco MGX 8800/8900 Series Software Configuration Guide
Release 5.1, Part Number OL-6482-01, Rev. A0, January 25, 2005
Chapter 5 Preparing SRM Cards for Communications
Establishing Redundancy Between SONET/SDH Lines with APS
Step 5 To verify your configuration changes, enter the dspln -ds3 <X.line> command.
If you are configuring a MGX 8850 (PXM1E/PXM45) switch, replace X with 15 for an SRM in the upper
bay, or 31 for an SRM in the lower bay. If you are configuring a MGX 8830 switch, replace X with 7.
Replace line with the line number, which is in the range of 1 to 3 on an SRM-3T3/C card.
Establishing Redundancy Between SONET/SDH Lines with APS
On MGX 8850 (PXM1E/PXM45) and MGX 8830 switches, the SRME and SRME/B support intercard
redundancy, where the working line is connected to the primary card, and the protection line is
connected to the secondary card.
Note T3 configurations of SRM do not support APS redundancy.
To establish redundancy between two lines on different cards, use the following procedure.
Note For intercard APS to operate properly on a MGX 8850 (PXM1E/PXM45), an APS connector must be
installed between the two SRM back cards. For more information in the APS connector and how to
install it, refer to either the Cisco MGX 8800/8900 Hardware Installation Guide, Releases 2 - 5.1. For a
MGX 8830 shelf, you do not need to install a separate APS connector between the two SRM cards
because APS functionality is built into the switch.
Step 1 Establish a configuration session with the active PXM using a user name with GROUP1_GP privileges
or higher.
Note All SRM configuration is done from the active PXM card.
-clk The -clk option selects the source timing for transmitting messages over the line. Replace
<clockSource> with 1 to use the clock signal received over this line from a remote node,
or specify 2 to use the local timing defined for the local switch. For information on
defining the clock source for the local switch, see the “Managing the Time of Day Across
the Network Using SNTP” section in Chapter 9, “Switch Operating Procedures.”
Note This option does not apply to SRME/B cards or SRM-3T3/C. These cards operate
in free run mode, with a free running local oscillator for the tx clock source on the
card.
-rfeac Specifies the number of bits for FEAC validation. Replace <RcvFEACValidation> with
either a 1 to specify 4 out of 5 bits, or 2 to specify 8 out of 10 bits.
Note Option 1, 4 out of 5 bits, is the only option supported on SRME/B cards.
Table 5-2 Parameters for T3 Line Configuration (continued)
Parameter Description