Specifications

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Cisco MGX 8850 (PXM45) and MGX 8950 Software Configuration Guide

Release 3, Part Number 78-14788-01 Rev. C0, January 2004

Chapter 1 Preparing for Configuration

Collecting Information

You can modify the priority, stratum level, and clock source reference through the cnfncdpclksrc

command, as described in Chapter 7, “Switch Operating Procedures”, in the section “Configuring an

NCDP Clock Source”

Figure 1-7 shows an example NCDP network clock source topology. The numbers represent the priority

of each network clock source, with 1 being the highest priority (or second best clock source) and 10

being the lowest priority. In this example, if the root clock source fails, the clock source with priority 1

would take over as the root clock, and so forth.

Figure 1-7 Example NCDP Network Clock Source Topology

Consider the following information when you create your NCDP network clock source plan:

• Clock sources that are located near the center of the network minimize clock signal propagation

delay.

• Once you enable NCDP on an NNI port, NCDP is enabled on all NNI ports by default. This include

PNNI ports, IISP ports, and AINI ports.

• NCDP is disabled on virtual trunks by default.

• You can add clock sources to any UNI or clocking ports on the node.

• On every port with NCDP enabled, a control VC is established on which configuration and network

topology information is exchanged between the connected nodes. On non-virtual trunks, the control

VC is always established on the VCI 34, and on the VPI 0. On Virtual Trunks (VTs), the control VC

is established on the VCI 34, and on the minimum negotiated VPI.

• BITS clock interfaces receive Stratum-3 or higher clock signals.

• Multiple clock sources provide fault tolerance.

• Clock Distribution is supported for up to 200 nodes in the network. A network containing more than

200 nodes should have multiple clock sources.

• Once you enable NCDP on one port, it is automatically enabled on all NNI ports in the network.

• When using an external clock source and redundant PXM cards, use a Y-cable to connect that clock

source to the same clock port on both PXM cards. Do not run separate external clock sources to each

card, as this can produce timing problems.

80174

Root clock

source

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