Installation guide

Configuring Cisco G.SHDSL HWICs in Cisco Access Routers
Troubleshooting Cisco G.SHDSL HWICs
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dsSciWrFails1 0, dsSciWrFails2 0, dsSciAuxWrFails1 0
dsSciAuxWrFails2 0, dsSciRsWrFails1 0, dsSciRsWrFails2 0
usSciInvalidLen 0, usSciUnexpectedAck 0, usSciMsgFw2EctFails 0
usSciMsgFw2CctFails 0, usSciAuxInvalidLen 0, usSciSendFails 0
usDciSendFails 0, sciBlocking 0, dciBlocking 0
EC information:
mctMsgsRx 0, mctMsgsTxFails 0, mctMsgsTxOks 0
VOS Pipes:
/pipe/CCT_FROM_APP_0, mqp 0x3c0c78, nmsgs 32, msgsize 400
magic 0xbeefbacc, p_start 0x3c0ca8, p_end 0x3c3fa8, memsize 13056
free mhead 0x3c3e10 mtail 0x3c3c78 numfree 32
read qhead 0x0 qtail 0x0 qcount 0
/pipe/CCT_TO_APP_0, mqp 0x3c4018, nmsgs 64, msgsize 400
magic 0xbeefbacc, p_start 0x3c4048, p_end 0x3ca648, memsize 26112
free mhead 0x3c6e80 mtail 0x3c6ce8 numfree 64
read qhead 0x0 qtail 0x0 qcount 0
/pipe/CCT_FROM_MCT_0, mqp 0x3ca6b8, nmsgs 96, msgsize 400
magic 0xbeefbacc, p_start 0x3ca6e8, p_end 0x3d3fe8, memsize 39168
free mhead 0x3cabb0 mtail 0x3caa18 numfree 96
read qhead 0x0 qtail 0x0 qcount 0
/pipe/CCT_FROM_ECT_0, mqp 0x3d4058, nmsgs 32, msgsize 400
magic 0xbeefbacc, p_start 0x3d4088, p_end 0x3d7388, memsize 13056
free mhead 0x3d4088 mtail 0x3d71f0 numfree 32
read qhead 0x0 qtail 0x0 qcount 0
/pipe/MCT_TO_ECT_0, mqp 0x3d73f8, nmsgs 64, msgsize 400
magic 0xbeefbacc, p_start 0x3d7428, p_end 0x3dda28, memsize 26112
free mhead 0x3d7428 mtail 0x3dd890 numfree 64
read qhead 0x0 qtail 0x0 qcount 0
/pipe/CCT_TO_ECT_0, mqp 0x3dda98, nmsgs 32, msgsize 400
magic 0xbeefbacc, p_start 0x3ddac8, p_end 0x3e0dc8, memsize 13056
free mhead 0x3e0a98 mtail 0x3e0900 numfree 32
read qhead 0x0 qtail 0x0 qcount 0
/pipe/CCT_TO_MCT_0, mqp 0x3e36e8, nmsgs 96, msgsize 400
magic 0xbeefbacc, p_start 0x3e3718, p_end 0x3ed018, memsize 39168
free mhead 0x3ead08 mtail 0x3eab70 numfree 96
read qhead 0x0 qtail 0x0 qcount 0
/pipe/MCT_FROM_ECT_0, mqp 0x3ed088, nmsgs 64, msgsize 400
magic 0xbeefbacc, p_start 0x3ed0b8, p_end 0x3f36b8, memsize 26112
free mhead 0x3ed0b8 mtail 0x3f3520 numfree 64
read qhead 0x0 qtail 0x0 qcount 0
Tasks:
tIPC delay 00000 flags 0x002 schedcnt 106899104
tMCT_0 delay 00000 flags 0x000 schedcnt 21379921
tCCT delay 00011 flags 0x000 schedcnt 10743684
sCCT delay 00236 flags 0x000 schedcnt 537184
tECT delay 00460 flags 0x000 schedcnt 537195
tDMT delay 00010 flags 0x000 schedcnt 11280188
***** Firmware Status Information End *****
IPC Info: host_base=0xF59B040, sram_base=0xB81E0000
CmdType Tx TxErr Rx RxFailed RxUnknown