Specifications

5-12
PA-8T-V.35 Synchronous Serial Port Adapter Installation and Configuration
OL-3563-03
Chapter 5 Configuring the PA-8T-V.35 Interfaces
Configuring the Interface
Cisco IOS Release 12.0(3)T or later or Cisco IOS Release 11.3(7)NA or later supports nonstandard clock
rates on PA-8T-V.35 interfaces installed in Cisco uBR7200 series routers.
Nonstandard clock rates are rounded (if necessary) to the nearest clock rate that the hardware can
support.
Set a nonstandard clock rate for an interface using the clock rate subcommand. Before you can assign
a nonstandard clock rate, you must use the interface serial command (followed by the interface address
of the interface) to select the interface to which you want to assign the nonstandard clock rate value.
In the following example, a nonstandard clock rate of 1234567 bps is specified:
Router(config-if)# clock rate 1234567
The preceding command example applies to all systems in which the PA-8T-V.35 is supported. Use the
no clock rate command to remove the clock rate.
When you have finished, press Ctrl-Z—hold down the Control key while you press Z—or enter end or
exit to exit configuration mode and return to the EXEC command interpreter prompt. Then write the new
configuration to NVRAM using the copy running-config startup-config command.
The following example shows how to use the show running-config command to determine the exact
clock rate to which the nonstandard clock rate was rounded:
Router# show running-config
Building configuration...
...
!
interface Serial1/0 (interface Serial3/1/0 on a VIP or FlexWAN module)
no ip address
clockrate 1151526
!
...
In the preceding example, only the relevant output from the show running-config command is shown;
other information is omitted.
Inverting the Clock Signal
Systems that use long cables or cables that are not transmitting the TxC (clock) signal might experience
high error rates when operating at the higher transmission speeds. If a PA-8T-V.35 DCE port is reporting
a high number of error packets, a phase shift might be the problem. Inverting the clock might correct this
phase shift.
When the PA-8T-V.35 interface is a DTE, the invert-txc command inverts the TxC signal the interface
receives from the remote DCE. When the PA-8T-V.35 interface is a DCE, this command inverts the clock
signal to the remote DTE port. Use the no invert-txc command to change the clock signal back to its
original phase.
Inverting the Data Signal
If the interface on the PA-8T-V.35 is used to drive a dedicated T1 line that does not have B8ZS encoding
(a method to avoid 15 zeros), you must invert the data stream (both TXD and RXD) either in the
connecting CSU or DSU or the interface. To invert the data stream coming out of the PA-8T-V.35, use
the invert data command. By inverting the High-Level Data Link Control (HDLC) data stream, the
HDLC zero insertion algorithm becomes a ones insertion algorithm that satisfies the T1 requirements.