Specifications

35
Release Notes for Cisco IOS Release 12.0 S
78-7130-11 Rev. B0
New and Changed Information
NPE-175/NPE-225
Platforms: Cisco 7200 series
The network processing engine is available in five versions: NPE-150, NPE-175, NPE-200, NPE-225,
and NPE-300. The network processing engines have the same functionality; however, the performance
differs because of the microprocessor type and the type of memory for packet data (SRAM and DRAM,
or SDRAM) each network processing engine provides.
The latest network processing engines, the NPE-175 and NPE-225, consist of two modular boards: the
processing engine and the network controller board. SRAM is not included in the NPE-175 or NPE-225.
OC-12c Dynamic Packet Transport Port Adapter
Platforms: Cisco 7200 series, Cisco 7500 series
The Dynamic Packet Transport (DPT) port adapter is a dual-width OC-12c port adapter that provides a
shared IP over SONET capability in a Cisco 7200 series, Cisco 7200 VXR, or Cisco uBR7200 series
router.
The DPT port adapter is designed to be deployed in SONET OC-12 DPT rings. DPT rings can also be
connected to SONET add drop multiplexers (ADMs), thus allowing for the creation of small or very
large DPT rings. See the following document for further information:
http://www.cisco.com/univercd/cc/td/doc/product/core/7206/7206cfig/6481oc12.htm
PA-MC-2T3+ Multichannel T3 Port Adapter
Platforms: Cisco 7200 series, Cisco 7500/RSP series
The PA-MC-2T3+ is a single-width port adapter that provides two T3 interface connections using BNC
connectors. The interface can provide up to 28 T1 lines (a single T3 group). Each T1 line is presented
to the system as a serial interface that can be configured as one or more serial interfaces.
The PA-MC-2T3+ is a channelized port adapter that sends and receives data bidirectionally at the T3
rate of 44.736 Mbps (digital signal carried on a T3 line, DS3). The T3 connection, provided by two
female BNC connections for transmit (TX) and receive (RX), requires 734A coaxial cable that has an
impedance of 75 ohms.
On the VIP2, PA-MC-2T3+ microcode is loaded into and operates from synchronous dynamic
random-access memory (SDRAM) on the VIP2-50. See the following document for further
information:
http://www.cisco.com/univercd/cc/td/doc/product/core/7206/7206cfig/64452t3/index.htm
Process MIB
Platforms: Cisco 7200 series, Cisco 7500/RSP series, Cisco 12000 series
The addition of the CISCO-PROCESS-MIB and changes to the CISCO-MEMORY-POOL-MIB allow
the retrieval of additional CPU and memory statistics and their reporting by Sample Network
Management Protocol (SNMP). The CISCO-PROCESS-MIB provides CPU 5-second, 1-minute, and
5-minute statistics. In addition, this MIB provides CPU utilization and memory allocation and
deallocation statistics for each process on each CPU listed in the CISCO-PROCESS-MIB.
The CISCO-PROCESS-MIB is enabled when the first SNMP command is configured. The background
statistics collection for Versatile Interface Processor (VIP) cards and the master CPU occurs even if the
SNMP subsystem is not initialized.