Troubleshooting guide

11-9
ATM and Layer 3 Switch Router Troubleshooting Guide
OL-1969-01
Chapter 11 Troubleshooting Layer 3 Network Connections
System Architecture
Figure 11-4 High-Level Layer 3 Enabled ATM Switch Router Architecture
The switching fabric or shared memory fabric, show in Figure 11-4, differs for the two Catalyst 8500
CSR switches. The Catalyst 8540 includes 12-MB shared memory while the Catalyst 8510 includes
3-MB of shared-memory. This shared memory is dynamic, meaning that a packet stored in memory takes
only as much memory as it needs. Access into and out of the shared memory is dynamically allocated
by the direct memory access (DMA) ASIC. Because the switch fabric is nonblocking, it does not require
per-port buffers; the fabric speed is faster than the combined speed of all the ports. Congestion, therefore,
only occurs when an individual output port is congested.
The line cards, show in Figure 11-4, are designed to carry considerable intelligence for the switching
system. Each line card contains ASICs designed to provide input and output into the fabric as well as to
maintain a Layer 3 FIB or a Layer 2 MAC address table. These tables allow the Layer 3 enabled ATM
switch router to make switching decisions very quickly prior to transmission across the switching fabric.
The line cards, therefore, must work closely with the route processor to ensure that all address tables and
routing information is current. The line cards are also responsible for presenting a uniform frame to the
switching fabric for effective buffering, QoS policy enforcement, and packet switching.
Each of the three main components of the Catalyst 8540 CSR are described in detail in the following
sections.
Route Processor
The system route processor is the first element of the Layer 3 enabled ATM switch router architecture
and resides at the core of the switch. The route processor resides on the switch route processor (SRP)
module, along with the shared memory fabric, described in the “Switching Fabric and Arbitration”
section on page 11-13. The route processor for the Catalyst 8510 CSR is a 64-bit 100Mhz R4600 RISC
processor. Its architecture is very similar to that of the Cisco 7500 Route Switch Processor (RSP). The
route processor for the Catalyst 8540 CSR is a 200Mhz R5000 RISC processor, very similar to the RSP-4
engine. The Layer 3 enabled ATM switch router SRP runs the Cisco IOS Release 12.0 or later software.
10- or 40-Gbps
Shared
memory
fabric
Fast Ethernet 0/2. Queue 0 - HH-P
SI
Line Card
SI
Line Card
SI
Line Card
SI
Line Card
FIB Table
FIB Table
FIB Table
FIB Table
Route Processor
Routing table/Central
FIB table
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