Specifications

5-19
PA-MC-2T3+ Multi-Channel T3 Port Adapter Installation and Configuration
OL-3526-05
Chapter 5 Configuring Channelized mode for the Cisco PA-MC-2T3+
Configuring a Channelized T3 Link
Data in Interval 1:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
Data in Interval 2:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
Data in Interval 3:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
Data in Interval 4:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
Data in Interval 5:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
Data in Interval 6:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
Data in Interval 7:
1 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 1 Severely Err Framing Secs
0 Unavailable Secs, 1 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
Total Data (last 7 15 minute intervals):
1 Line Code Violations, 0 P-bit Coding Violation,
0 C-bit Coding Violation, 0 P-bit Err Secs,
0 P-bit Severely Err Secs, 1 Severely Err Framing Secs,
0 Unavailable Secs, 1 Line Errored Secs,
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
T1 1
Not configured.
T1 2
Not configured.
T1 3
Not configured.
T1 4
Not configured.
T1 5
Not configured.