Network Router User Manual

13-10
Cisco 7304 Router Modular Services Card and Shared Port Adapter Software Configuration Guide
OL-4807-02
Chapter 13 Configuring the 2-Port and 4-Port T3/E3 SPAs
Configuration Tasks
Verifying MDL
Use the show controllers serial command to display the MDL settings:
router# show controllers serial 6/0/0
Serial6/0/0 -
Framing is c-bit, Clock Source is Line
Bandwidth limit is 44210, DSU mode 0, Cable length is 10
rx FEBE since last clear counter 2, since reset 0
Data in current interval (546 seconds elapsed):
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation
0 P-bit Err Secs, 0 P-bit Sev Err Secs
0 Sev Err Framing Secs, 0 Unavailable Secs
0 Line Errored Secs, 0 C-bit Errored Secs, 0 C-bit Sev Err Secs
Data in Interval 1:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation
0 P-bit Err Secs, 0 P-bit Sev Err Secs
0 Sev Err Framing Secs, 0 Unavailable Secs
0 Line Errored Secs, 0 C-bit Errored Secs, 0 C-bit Sev Err Secs
.
.
.
Data in Interval 96:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation
0 P-bit Err Secs, 0 P-bit Sev Err Secs
0 Sev Err Framing Secs, 0 Unavailable Secs
0 Line Errored Secs, 0 C-bit Errored Secs, 0 C-bit Sev Err Secs
Total Data (last 24 hours)
0 Line Code Violations, 0 P-bit Coding Violation,
0 C-bit Coding Violation,
0 P-bit Err Secs, 0 P-bit Sev Err Secs,
0 Sev Err Framing Secs, 0 Unavailable Secs,
0 Line Errored Secs, 0 C-bit Errored Secs, 0 C-bit Sev Err Secs
No alarms detected.
0 Sev Err Line Secs, 1 Far-End Err Secs, 0 Far-End Sev Err Secs
0 P-bit Unavailable Secs, 0 CP-bit Unavailable Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 0 Far-end path failures
No FEAC code is being received
MDL transmission is enabled
EIC: tst, LIC: 67,
Test Signal GEN_NO: test
Far-End MDL Information Received
EIC: tst, LIC: 67,
Test Signal GEN_NO: test
Configuring Scramble
T3/E3 scrambling is used to assist clock recovery on the receiving end. Scrambling is designed to
randomize the pattern of 1s and 0s carried in the physical layer frame. Randomizing the digital bits can
prevent continuous, nonvariable bit patterns—in other words, long strings of all 1s or all 0s. Several
physical layer protocols rely on transitions between 1s and 0s to maintain clocking.