CobraNet™ EV-2 Digital Audio Networking Processor CobraNet TM EV-2 Development System Manual ©Copyright 2005 Cirrus Logic, Inc. http://www.cirrus.
CobraNet™ EV-2 Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one nearest to you go to www.cirrus.com IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied).
CobraNet™ EV-2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Getting Started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Required Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Included: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Not Supplied: . . . . . . . . . . . .
CobraNet™ EV-2 Introduction The EV-2 provides a means of evaluating the CM-1 or CM-2 CobraNet™ Modules and the Cirrus Logic CobraNet Silicon Series of devices. In addition to evaluating the CM-1 or CM-2 (hereafter collectively referred to as the CM except where differences between the CM-1 and CM-2 exist), the user may also use the EV-2 as a development platform and as an example interface for CMs, the Cobranet Silicon Series, and other CobraNet related projects.
CobraNet™ EV-2 • Routing flexibility: Route from any audio source to any audio sink using the supplied EV-2 software. Route to and from the CM as well as within the EV-2. • Sine wave generation: A sine wave test tone may be used as an alternate audio source. Minimal frequency and gain control is provided. • Hex switches: Four hex formatted switches may be used for network identification of the CobraNet module and/or user development.
CobraNet™ EV-2 Getting Started Required Materials Included: The CobraNet EV-2 Development Package ships with the following materials: • EV-2 module w/ CM CobraNet PCB Qty. (2) • 3’ CAT5 crossover cable Qty. (1) • 6 - Pin Phoenix-style audio connectors Qty. (6) NOTE: In order to provide you with the latest versions of our firmware and software development kit (SDK), we use web-based distribution for our updates. To obtain the latest versions of documentation and software, please go to www.cirrus.
CobraNet™ EV-2 • CR300, when on, indicates an overflow condition detected on the A/D converter. • The units are now ready to pass audio. The audio input at J300 on one board should now appear at J401 on the other board and vice versa.
CobraNet™ EV-2 Switch and Connector Functionality J300 Audio Input Connector: Phoenix-style connector for two-channel balanced audio input, +14.4 dBu maximum (0 dBFS). Refer to Figure 3 for the signal connection. J401 Audio Output Connector: Phoenix-style connector for two-channel balanced audio output, +8.3 dBu maximum (0 dBFS). Refer to Figure 3 for the signal connection. + Left gnd + Right gnd Figure 3.
CobraNet™ EV-2 SW200 Programming switch: The EV-2 microcontroller can be programmed via its serial port, connector P501. The supplied software can be used to perform field updates to the board's code and firmware. This programming capability is initially disabled, but can be enabled by setting the hex switches to FFF8H and then clicking on the "Hex Switches" display (see Figure 6 ). For more information about the programming mode, please refer to the Programming the Microcontroller section.
CobraNet™ EV-2 • Select the appropriate PC serial port. The software will attempt to make contact with the EV-2. • Once communication is established, the routing can then be configured. (See Figure 5 below for an example of a routing scheme.) Figure 5. Screen Shot of EV-2 Software - Audio Routing Interface The default on power up state of the EV-2 is for the ADC and DAC to be the source and sink respectively, using the CM’s SSI #0 I/O stream.
CobraNet™ EV-2 Detailed Description of EV-2 Components The Microcontroller The microcontroller on the EV-2 is a Philips Semiconductor P89C51RD2. This microcontroller has 64 kByte of internal Flash Program Memory and 1 kByte of Static RAM. The microcontroller is field programmable using the provided CNEval.exe software. The microcontroller's clock rate is 33Mhz.
CobraNet™ EV-2 Microcontroller Port Connections: Port 0: used for the address/data (AD) bus. Once configured, the FPGA latches the lower address byte from the AD lines. Port 1: used for several purposes as shown in Table 4 on page 12. Bit # Name of Signal I/O Description 0 INIT_IO# I Used when configuring the FPGA. Refer to Xilinx Spartan datasheet for more detail. 1 PROGRAM# O Used to initiate the FPGA configuration. Refer to Xilinx Spartan datasheet for more detail.
CobraNet™ EV-2 Port 3: See Table 5 on page 13. Bit # Name of Signal I/O Description 0 RXD I RS232 serial port receive signal. 1 TXD O RS232 serial port transmit signal 2 HREQ# O Connected to the CM module host request signal. See CobraNet Technical Datasheet for a complete description of this signal. 3 HACK# I Connected to the CM module host acknowledge signal. See CobraNet Technical Datasheet for a complete description of this signal.
CobraNet™ EV-2 In the EV-2 application, the host address lines are generated by the address latch in the FPGA (see Table 6 on page 16) and the host data bus is connected directly to the data bus of the microcontroller. The HREQ# and HACK# signals are connected to the two interrupt inputs of the microcontroller. These signals may be used for data handshaking and asynchronus notification respectively. The final host signal, HRESET#, resets the CM when asserted low.
CobraNet™ EV-2 Interfacing Serial Audio to the CM In general, interfacing to most off-the-shelf A/D and D/A converters is straightforward and the CM is no exception. Most signals for a direct connection to these as well as other audio ICs such as the CS8420 AES3 transceiver, are available on the CM module interface connector. Most converters provide for a choice of bit clock and sample (frame) clock polarity, as well as audio data formats such as SPI™ or I2S.
CobraNet™ EV-2 Memory Location R/W Description 0x8000 W Bit register for green LED, CR903. 0=LED on, 1=LED off. Refer to Table 10 on page 20 for this and other LED registers. 0x8001 W Bit register for red LED, CR904. 0=LED on, 1=LED off. 0x8002 W Bit register for yellow LED, CR905. 0=LED on, 1=LED off. 0x8004 W Bit register for green LED blink control. 0=blink off, 1=blink on. 0x8005 W Bit register for green LED blink control. 0=blink off, 1=blink on.
CobraNet™ EV-2 Memory Location R/W Description 0x8030 W SSI 2 audio routing address (Table 7 on page 18). 0x8031 W Bit register for SSI 2 mute signal. 0=Muted, 1=Unmuted. 0x8038 W SSI 3 audio routing address (Table 7 on page 18). 0x8039 W Bit register for SSI 3 mute signal. 0=Muted, 1=Unmuted. 0x8040 Note 1 CM-1 Host Port ICR register. CM-2 Message-A register. 0x8041 Note 1 CM-1 Host Port CVR register. CM-2 Message-B register. 0x8042 Note 1 CM-1 Host Port ISR register.
CobraNet™ EV-2 Configuring the FPGA The FPGA is configured from data that is stored in the upper 16kbytes (0xC000-0xFFFF) of the microcontroller’s Flash Program Memory. The microncontroller code for configuring the FPGA uses express mode which writes byte-wide data to the FPGA. Refer to the Xilinx Spartan XL family data sheet for more information on the express mode configuration operation. The address used for writing configuration data is 0x8800.
CobraNet™ EV-2 Sine Wave Generator The FPGA contains a 32-sample, 24-bit, sine table. The table is stepped through at the sample clock rate so the resulting fundamental frequency is 48kHz / 32 samples = 1500Hz and 3000Hz at 96kHz. Limited control over frequency and gain is provided. Listed below are the values to write to the frequency and gain registers in the FPGA. Frequency register data bits AD3 AD2 AD1 AD0 Frequency 48kHz sample rate (96kHz sample rate) 0 0 0 1 1.5 kHz (3.
CobraNet™ EV-2 LED Control There are two bit registers to control the state of each of three LEDs. The mapping of control bits to LED behavior is described in Table 10 on page 20. The data bit is always AD0. Note that blink overrides on/off but when blink is turned off the LED will go to the state designated by the On/Off bit.
CobraNet™ EV-2 Hex Switches Four pins on the 8051 allow the hex switches to be read. The EV-2 circuitry associated with the hex switches serves as an example implementing this common CobraNet feature (see Recommended User Interface Practices section in the CobraNet Programmer’s Manual for a discussion of use of this scheme). Requirements include a physical (hardware) mapping of the hex switches to a code (software) within the CM. Some of the requirements to achieve this are listed below: 1.
CobraNet™ EV-2 EV-2 Schematics, Page-by-Page Description The following sections provide detailed descriptions of the EV-2 schematic drawings contained in Appendix D. Block Diagram This page is a hierarchical block diagram showing an overview of all schematic pages and interconnects between pages. Microcontroller and Hex Switches This page shows an 8051-type microcontroller, its connections, and peripherals.
CobraNet™ EV-2 Appendix A: Definition of Terms This Appendix contains brief definitions of many of the terms used in the discussion of CobraNet and CobraNet networks. Audio Channel A single audio signal. Audio channels on CobraNet have a 48KHz sampling rate and may be 16, 20 or 24 bit resolution. Multiple audio channels may be carried in a Bundle. Audio Stream Two audio signals, i..e. a stereo pair. Audio on the EV-2 is routed in streams.
CobraNet™ EV-2 Ethernet A Local Area Network (LAN) technology that allows transmission of information between computers. Ethernet is, by far, the most widely deployed LAN standard worldwide. Fast Ethernet A newer version of Ethernet, also known as 100BASE-T. It supports data transfer rates of 100Mbps. CobraNet operates on a Fast Ethernet network. Full Duplex Data can be transmitted and received simultaneously. Half Duplex Data can only be transmitted in one direction at a time.
CobraNet™ EV-2 valid network connection or data may be corrupted. Longer distances can be achieved by upgrading the media or using multiple runs in series. Switch/Switching Hub A Switch examines addressing fields on data arriving at each port and attempts to direct the data out the port or ports to which the data is addressed. Data may be buffered within the Switching Hub to avoid the collision condition that may be experienced within a Repeater Hub.
CobraNet™ EV-2 Appendix B: EV-2 Specifications A/D: Cirrus Logic CS5381 AUDIO SPECIFICATIONS: • Two input channels. • Frequency Response (-1 dB from a full-scale 1 kHz sine wave input): 20 Hz to 20 kHz, +-0.1 dB, 48kHz sample rate 20 Hz to 40 kHz, +0.
CobraNet™ EV-2 D/A: Cirrus Logic CS4398 AUDIO SPECIFICATIONS: • Two output channels. • Frequency Response (-1 dB from a full-scale 1 kHz sine wave input): 20 Hz to 20 kHz, +-0.1 dB, 48kHz sample rate 20 Hz to 40 kHz, +0.
CobraNet™ EV-2 Appendix C: Other Resources A comprehensive array of CobraNet information can be accessed at the Cirrus Logic public website. Among the resources available are: FAQs, white papers, datasheets, programmer’s guides, network design guidelines, common network terminology, a listing of recommended and tested Ethernet equipment and set-up information for selected Ethernet switches. The main URL for this site is: http://www.cirrus.com.
A B C D Rev. 2.1 1 MCLK SSI_CLK FS1_OUT HPF# AD_RESET# EN_96K AUX_POWER[0..3] FS512_IN SSI_DIN0 SSI_DIN1 SSI_DIN2 SSI_DIN3 TXD HACK# HCS# HWR# HRESET# A[0..2] AD[0..7] ADDR3 RSVD[1..4] DA_RESET# DA_DATA MCLK SSI_CLK FS1_OUT EN_96K DA_CCLK DA_CS# WATCHDOG MUTE# A[0..7] RXD INIT_IO# MRESET HREQ# 1 MCU_P35 MCU_P17 FS1_IN SSI_CLK_IN SSI_DOUT0 SSI_DOUT1 SSI_DOUT2 SSI_DOUT3 RXD WATCHDOG MUTE# HREQ# HEN# MRESET MRESET# EV2_com.
A B C D +5V 5 5 5 5 BCH SW3 C BCH SW3 SW201 C SW202 BCH SW3 C BCH SW3 SW203 C SW204 1 2 4 8 1 2 4 8 1 2 4 8 1 2 4 8 1 1 2 3 4 1 2 3 4 R205 10KSIP 1 2 3 4 1 2 3 4 R206 10KSIP GND 1 GND B210 .1S +5V GND +5V 2 4 2 OUT 4 3 GND 10 11 12 13 14 3 4 5 6 1 15 2 10 11 12 13 14 3 4 5 6 1 15 2 2 74HC165 SER A B C D E F G H SH/LD CLK INH CLK U201 74HC165 SER A B C D E F G H SH/LD CLK INH CLK U202 Select programming mode.
A B C D 1X6PHNX 6 5 4 3 2 1 J300 100KS R321 GND 1 C302 C330 10A20S 10A20S C310 10A20S C320 GND VQ .01S8 C332 VQ GND .01S8 R331 100KS R311 100KS 100KS R301 10A20S C300 R322 10KP.1S R332 10KP.1S R312 10KP.1S R302 10KP.1S 3 2 3 2 3 2 3 2 7 -9VA 90.9P1S R330 2 90.9P1S R320 .1SGND OPA627 B321 .1S GND U320 6 .1SGND OPA627 B331 .1S GND U330 6 470PFS8 +9VA B320 -9VA C321 90.9P1S R310 .1SGND OPA627 B311 470PFS8 +9VA B330 C331 -9VA 90.9P1S R300 .1SGND .
A B C GND 2 28 1 6 4 5 3 14 27 GND R403 1KP1S DA_RESET#13 GND EN_96K 9 DA_CCLK 10 DA_CDOUT11 DA_CS# 12 MCLK SSI_CLK FS1_OUT DA_DATA B404 .1S B413 .1S B411 .1S RST B412 .1S 1 -9VB U400 VREF FILT+ VQ AOUTL- AMUTEC AOUTL+ GND B401 .1S +5VB GND TP400 TPG GND 19 18 20 16 17 15 26 24 25 C404 + C401 10A6S 23 EN_96K CS4398 AOUTR- BMUTEC REF_GND M3 (AD1/CDIN) M2 (SCL/CCLK) M1 (SDA/CDOUT) M0 (AD0/CS) AOUTR+ DSD_SCLK DSD_A DSD_B MCLK SCLK LRCK SDIN VLC VLS B410 .
A B C D GND TP501 TPG HACK# HRW HCS# HREQ# HEN# 1 WATCHDOG SSI_CLK_IN SSI_DOUT0 SSI_DOUT1 SSI_DOUT2 SSI_DOUT3 SSI_DIN0 SSI_DIN1 SSI_DIN2 SSI_DIN3 SCI_RXD SCI_CLK HACK# HRW HCS# HREQ# HEN# A0 A1 A2 AD0 AD1 AD2 AD3 AD4 AD5 AD6 HRESET# AD7 ADDR3 RSVD2 MUTE# FS1_IN FS512_OUT FS512_IN REF_CLK_IN SSI_CLK_IN SSI_DOUT0 SSI_DOUT1 SSI_DOUT2 SSI_DOUT3 SSI_DIN0 SSI_DIN1 SSI_DIN2 SSI_DIN3 RSVD3 WATCHDOG RSVD4 AUX_POWER2 AUX_POWER0 HRESET# MUTE# FS1_IN FS512_OUT FS512_IN AUX_POWER[0..3] RSVD[1..
A B C D GND FS1_IN B500 .1S 7 14 SSI_CLK_IN GND B601 .1S FS512_IN GND VCC U510E SSI_CLK_IN 11 8 6 1 FS1_IN 74LVX125A GND 74LVX86S U601E VCC 74LVX86S U601D 74LVX86S U601C 74LVX86S U601B VCC_+3 VCC_+3 GND 7 14 13 12 10 9 5 4 VCC_+3 FS512_IN R606 10KP1S 2 1 U510B 74LVX125A 6 GND GND 2 U510D 74LVX125A 12 11 5 9 U510C 74LVX125A 8 GND U510A 74LVX125A 3 GND 51.1P1S R512 2 GND C606 .1S GND 2 1 24.576MHZ VCXO SSI_CLK 51.1P1S R514 51.
A B C FS512_OUT GND 1 B506 .1S VCC_+3 4 3 2 1 Q Q VCC Q Q GND R701 110P1S 9 8 GND VCC_+3 14 5 6 7 C701 .47S 5 4 RST FILT DFC0 DFC1 H/S SDIN ISCLK ILRCK OMCK RXN RXP EN_96K 2 TXN TXP CS8420 U501C 74LVX125A 8 U501B 74LVX125A 6 EN_96K 5 EN_96K# U700 SDOUT OSCLK OLRCK 51.1P1S R507 11 10 20 1 28 3 19 15 25 26 18 16 17 B701 .1S GND +5V RERR RMCK PRO/C COPY ORIG EMPH/U AUDIO/V TCBL GNDGND FS512_OUT 9 9 8 2 27 24 14 13 12 21 GND EN_96K# GND R711 1.
A B C D -12V C480 .01S8 B480 .1S 1 C470 .01S8 B451 .1S B470 .1S +12V GND B461 .1S 2 3 6 7 4 1 B450 .1S + OUT ADJ LM337L IN IN IN IN VR480 LM317L OUT OUT OUT ADJ OUT VR470 IN GND OUT +12V GND 1 4 2 3 6 7 R480 249P1S R481 1.54KP1S R471 1.54KP1S R470 249P1S GND GND -9VA 2 C481 10A20S GND 1 IN VR460 78M05S OUT ATX_POWER 3 GND 11 12 13 14 15 16 17 18 19 20 3 GND C482 .01S8 C472 .
A B C LED2 LED1 LED0 Rev. 2.1 1 LEDPCYLW CR905 LEDPCRED CR904 LEDPCGRN CR903 464P1S R905 464P1S R904 464P1S R903 +5V FS1_OUT DA_DATA GND B907 .1S VCC_+3 GND I/O, GCK1 I/O I/O, TDI I/O, TCK I/O, TMS I/O I/O I/O I/O GND VCC3 I/O I/O I/O I/O I/O I/O I/O I/O I/O, GCK2 M1 GND M0 VCC3 2 DA_DATA R901 51.1P1S 1 FS1_OUT 2 3 RSVD3 SSI_DIN3 4 SSI_DIN2 5 SSI_DIN[0..3] SSI_DIN1 6 SSI_DIN[0..3] SSI_DOUT[0..3] SSI_DIN0 7 SSI_DOUT[0..
CobraNet™ EV-2 Appendix E: EV-2 Command Line Interface. The EV-2 supports a simple command line interface (CLI). This interface allows the user to evaluate the CobraNet module (CM) and monitor and control Host Management Interface (HMI) variables. A list and description of commands follow. Please reference the CobraNet Programmer’s Manual for more information about the HMI variables. Please note that there is a significant difference between the CM-1 and CM-2 HMI variable format, i.e.
CobraNet™ EV-2 Poke [offset] This command will set the value of the given location in CobraNet memory space to . – same as peek above. – a hexadecimal with a “0x” prefix. Example: poke 0x40104 0x1011 [offset] – optionally used with HMI array variables only. Offset into the HMI array. If not present on an HMI array variable the poke will poke the into the first location of the array.
CobraNet™ EV-2 There are a number of commands that control the state of the EV-2 board. Some of these commands should prove useful to the user when evaluating the CM. These commands are: Route
CobraNet™ EV-2 Example: led green toggle. This will change the state of the green LED. If it was on it will be off. If the LED was in blink mode the LED will continue to blink but will assume the opposite state prior to the toggle command if blinking is stopped. Query This is a command to return information about the EV-2 and/or CM. = system: returns information such as MAC address and software/firmware revision levels. hex: returns the value of the hex switches on the EV-2 board.
CobraNet™ EV-2 TestEV This is used for manufacturing tests of the EV-2 and in general only the ‘resetcn’ will be useful to the user. = memory – performs an EV-2 memory test, returns either a pass or fail. watchdog – checks the CM watchdog signal to make sure it is in tolerance. Returns pass or fail and measured frequency of CM watchdog signal host – performs a host test, returns pass or fail. resetcn – resets the CM.
CobraNet™ EV-2 Read This command reads the raw value of the host register. Note that the architecture is significantly different between the CM-1 and CM-2. = (for CM-1, the DSP5303 host register interface.) icr: read the icr register. cvr: read the cvr register. isr: read the isr register. ivr: read the ivr register. drh: read the drh (rxh) register drm: read the drm (rxm) register drl: read the drl (rxl) register.
datab: write the value to the data B register. datac: write the value to the data C register. datad: write the value to the data D register. – a hexadecimal with a “0x” prefix. The individual registers are byte wide, a hexadecimal in the parameter greater than a byte will only use the least significant byte. Example: write msgc 0xb3 Please note that writing certain registers may trigger CobraNet events.
