User Manual

EP7309/11/12 User’s Manual - DS508UM4 9-1

Chapter 9

9LCD Interface

Introduction

The LCD interfac e provides all the necessary con trol signals to in terface directly to a

single panel multiplexed LCD. It is programmable for different line lengths, bits-per-

pixel and refresh rates. The frame buffer can reside in either SDRAM and RAM

memory. 1/4 VGA support is typical bu t 1/ 2 VGA (mon ochrome) sup port is possible

assuming a refresh rate above 40 Hz is not required. When the CPU speed is set to 74

MHz, the bus speed will be 36 MHz. When the CPU speed is set to 90 Mhz, the bus

speed will be 45 MHz. Calculations made using the formulas in this chapter must

take CPU and bus speed variables into account.

Features

• 1-2-4 bpp (bits per pixel)

• Programmable panel size to a m aximum of 1024x256 at 4 bps

• Relocatable Frame Buffer (SRAM or SD RA M)

• Programma ble refresh rates

•16grayscalevalues

• Color screen interface capability

LCD Register List

Table 9-1: LCD Registers

Address Name Type Size Description Page

0x8000.02C0 LCDCON R/W 32 LCD Control Register page 9-7

0x8000.0580 PALLSW R/W 32 Least Sig. Word Palette page 9-8

0x8000.540 PALMSW R/W 32 Most Sig Word Palette page 9-8

0x8000.1000 FBADDR R/W 4

Frame Buffer Start Address

page 9-9