User Manual

EP7309/11/12 User’s Manual - DS508UM4 8-1
Copyright Cirrus Logic, Inc. 2003
88
8
Chapter 8
8SRAM/Expansion Bus Controller
Introduction
The SRAM/ Ex pansion bus c ontroller allows for control and access to
internal/external SRAM memory as well as extern al peripherals th at requ ire
read/write access to the EP73xx memory bus. The following description will
encompass both situations and detail the programming and c onfiguration of each of
bus.
Features
• Six programmable chip selects CS0-CS5
• CS6 (Internal SRAM) chip select pre-programmed
•
CS7 (In ternal Boot ROM) chip select pre-program med
• Wait states programmable from 0-8
• Bus width programmable from 8-32 bits wide
SRAM / Expansion Bus Register List
Programming Example
;*****************************************************************************
; Expansion bu s settings in this example are based on the bootmode pins PE1 and
;
PE0 at nPOR (power-on-reset) as (0,0) with the PLL clock set at 74 MHz
;
nCS0 = 32-bit, 3 wait states
;
nCS1 = 32-bit, 2 wait states
;
nCS2 = 16-bit, 8 wait states
;
nCS3 = 32-bit, 1 wait state
;
nCS4 =8-bit,1waitstate
;
nCS5 = 32-bit, 8 wait states
;*****************************************************************************
Table 8-1: SRAM / Expansion Bus Registers
Address Name Type Size Description Page
0x8000.0180 MEMCFG1 R/W 32 Memory Config. Reg 1 page 8-3
0x8000.01C0 MEMCFG2 R/W 32 Memory Config. Reg 2 page 8-5