User Manual

EP7309/11/12 User’s Manual - DS508UM4 5-13

System Registers

URXFE2: UART2 receiver FIFO empty. The meaning of this bit dep ends on

thestateoftheUFIFOENbitintheUART2bitrateandlinecontrol

holding register contains is empty. If the FIFO is enabled, the

URXFE bit will be set when the RX FIFO is empty.

UTXFF2: UART2 transmit FIFO full. The m eaning of this bit depends on the

state of the UFIFOEN bit in the UART2 bit rate and line control

holding register is full. If the FIFO is enabled, the UTXFF bit will

be set when the TX FIFO is full.

Clear all Start-up Reason Flag Register (STFCLR)

Address: 0x8000.05C0, Write

Definition: A write to this location will clear all ‘Start-up reason’ flags in the

system flag status register SYSFLG. The SYSFLG register should be

read to determine the reason why the chip was or entered operating

state: (i.e., new battery installed). Any value may be written to this

location.

32-bit Unique ID Register (UNIQID)

Address: 0x8000.2440, Read Only

Definition: Unique-ID for SDMI compliance for secure internet applications.

This register is read-only, and is laser p rogrammed at th e factory.

Random ID 0 Register, bits 31-0 (RANDID0)

Address: 0x8000.2700, Read Only

Definition: This represents the fi rst 32 bits of a 128 bit r andom ID created at th e

factory. This is a read only register.

Random ID 1 Register, bits 63-32 (RANDID1)

Address: 0x8000.2700, Read Only

Definition: This represents the second 32 b its of a 128 bit random ID created at

the factory. This is a read only register

Random ID 2 Register, bits 95-64 (RANDID2)

Address: 0x8000.2700, Read Only

Definition: This represents the third 32 bit register of a 128 bit random ID

created at the factory. This is a read only register

Random ID 3 Register, bits 127-96 (RANDID3)

Address: 0x8000.2700, Read Only

Definition: This represents the upper 32 bits of a 128 bit random ID created at

the factory. This is a read only register