User Manual
EP7309/11/12 User’s Manual - DS508UM4 5-7
Copyright Cirrus Logic, Inc. 2003
System Registers
55
5
System Control Register 2 (SYSCON2)
Address: 0x8000.1100 , Read / Write
Definition: The SYSCON2 system control register is a 15-bit read/write register
which controls some of the general c onfiguration parameters for the
EP73xx as well as the control an d status of internal peripherals. All
bits i n this register are cleared upon system reset (nSYSRES).
Bit Descriptions:
SERSEL: SSI2/CODEC select. When this bit is cleared, SSI2 is c onnected to
the external pins. When it is set, the CODEC interface is
connected. The value of this bit is overridden when the DAISEL
bit of SYSCON3 is set, attaching the DAI to the pins.
KBD6: The state of this bit determines how many of the Port A inputs are
OR’ed together to create the keyboard interrupt. When zero (the
reset state), all eight of the Port A inputs will generate a keyboard
interrupt. When set high, only Port A bits 0 to 5 will generate an
interrup t from the keyboard. It is assumed that the keyboard row
lines are connected into Port A.
SDRAM Z: The bit determines the width of the SDR AM memory interface,
where: 0=32-bit SDRAM and 1=16-bit SDRAM.
KBWEN: W hen set, the CPU will wake from the STA N DBY or IDLE states
upon the assertion of a signal on any of the Port A inputs.
Enabling this feature will allow the CPU to wake up regardless of
the state of the KBDINT interrupt mask (INTMR 2 bit 0).
SS2TXEN: Transmit enable for the synchronous serial interface 2. The
transmit side of SSI2 will be disabled until this bit is set. When set
low, this bit also disables the
SSICLK pin (to save power) in master
mode, if the receive side is low.
SS2RXEN: Receive enable for th e synchronous serial interface 2. The receive
side of SSI2 will be disab led until th is bit is s e t. When both
SSI2TXEN and SSI2RXEN are disabled, the SSI2 i nterface will be
in a power saving state.
UART2EN: Internal UART2 enable bit. Setting this bit enab les the internal
UART2.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD BUZFRE
Q
CLKEN
SL
OSTB RSVD SS2MA
EN
UART2E
N
SS2RXE
N
RSVD SS2TXE
N
KBWEN SDRAM
Z
KBD6 SERSEL