User Manual

4-4 EP7309/11/12 User’s Manual - DS508UM4

Interrupt Controller

Interrupt Types and Priorities

The EP73xx interrupt controller can generate two types of interrupts: Standard (IRQ)

or Fast (FIQ). Seventeen of the twenty-two interrupt sources are IRQ interrupts, w hile

the remaining five are FIQ. F IQs have a higher priority than IRQs. If two interrupts

are received from within the same group (IRQ or FIQ), the order in which they are

serviced must be r esolved in software. The priorities are listed in Table 4-3.

Interrupt Operation

All interrupts are level sensitive; that is, they must conform to the following

sequence:

1. The interrupting devic e (either external or internal) asserts the appropriate

interrupt.

2. If the appropriate bit is set in the interrupt mask register, then either an FIQ

or an IRQ will be asserted by the interrupt controller. (Descriptions of each

bit in th is register can be found in “Interrupt Status Register 1 (INTSR1)”

on page 4-8.)

3. If interrupts are enabled, the processor jumps to the appropriate address.

4. Within the interrupt h andler routine, the status register is read to

determine if the source of the interrupt(s). This will determine which

subroutine(s) to call to service said interrupt(s).

5. Software in the interrupt service routine will clear the interrupt source by

an action specific to the device requesting the interrupt (i.e., reading the

UART RX register).

The i nterrupt service routine may then re-enable interrupts; other p endi ng interrupts

are serviced in a similar way. Alternately, the service routine may return to the

interrup t dispatch code, w hich can check f or pending interrupts and dispatch them

accordingly. The “End of Interrupt” type interrupts are latched . All other interrupt

sources (i.e., extern al interrupt s o urce) must b e held active until its respective service

routine starts exec uting. See “End-Of-Interrupt Locations” on page 4-13 for more

details.

Table 4-3: Exception Priority Handling

Priority Exception

Highest Reset

. Data Abort

.FIQ

.IRQ

.Prefetch Abort

Lowest Undefined Instruction, Software Interrupt