User Manual

EP7309/11/12 User’s Manual - DS508UM4 2-9

CPU Core

CPU Clocks

There are two clocks required to maintain any of the processor states that will be

described in the following section.

•RealTimeClock(RTC)

• On-chip PLL (Phase Lock L oop ) Clock

• External 13 MHz Clock (Optional)

Real Time Clock (RTC)

The RTC is generated from an external 32 kHz crystal oscillator created by the crystals

fundamental tone. The RTC, from the crystal will be clocked at 1 Hz. Internally, it

contains a match and data registers that are updated once per s econd. More

information is contained in Chapter 3 of the manual.

Real Time Clock Characteristics and Interface Requirements

• The external crystal connects directly to th e RTCIN and RTCOUT pins on the

processor.

• 32.768 k Hz frequency s h ould be created b y the fundamental tone of the

external crystal.

Table 2-2: ARM720T Core Coprocessor Registers

ID Register (Read/Write) register than may return an ID consisting of an

architecture version and ARM trademark

Control (Read/Write) register to enable MMU, cache, write buffer, and other

coprocessor operations

Translation Base Table (Read/Write) register contains the start address of the first

level translation table

Domain Access Control (Read/Write) register specifies permissions for all 16

domains

4Reserved

Fault Status (Read/Write) register indicates type of fault and domain of last data

abort. Write to this location flushes entire TLB.

6 Fault Address (Read/Write) register contains address of the last data access abort

Cache Operation (Write) register will configure or perform a clean (flush) of the

cache and write buffer when written to

8 TLB Operation (Write) register can configure or clean (flush) when written to

9-12 Reserved

13 Used to support WinCE. Returns a logic “1” if WinCE enhancements are enabled.

14-15 Reserved