User Manual

EP7309/11/12 User’s Manual - DS508UM4 14-1

1414

Chapter 14

14JTAG Interface

Introduction

EmbeddedICE

is an extens ion to the architecture of the ARM family of processors,

and provides the ability to debug c ores that are deeply embedded into systems. The

processor also has built-in test modes for functional testing of system clock and oth er

interfaces.

Features

•AsetofextensionstotheARMcore

• The EmbeddedICE macrocell, which provides external access to the

extensions

• The EmbeddedICE interface, wh ich provides com mu nication between the

host c omputer and the EmbeddedICE macrocell

• Debug Modes and Test Pins

Operational Overview

The IC EBreaker modu le consists of two real-time watchp oint units together with a

control and status register. One or both of the units can be programmed to halt the

execution of the instructions by the ARM processor. Execution is halted when either a

match occurs between the values programmed into th e ICEBreaker and the values

currently appearing on the address bus, data bus, and the various control signals.

Any bit can be masked to remove it f rom the comparison. Either unit can be

programmed as a watchpoint ( mon itoring data accesses) or a breakpoi nt (m onitoring

instruction fetches).

Using one of these watchpoint units, an unlimited number of software breakpoints

(in RAM) can be supported by s ub stitution of the actual code.

Note: The EXTERN[1:0] signals from the ICEBreaker module are not wired out in this

device. This mechanism is used to allow watchpoints to be dependent on an

external event. This behavior can be emulated in software via the ICEBreaker

control registers.

A more detailed description is available in the ARM Software D evelopment Toolkit User

GuideandReferenceManual. The ICEBreaker module and its registers are fully

described in the ARM7TDMI Data Sheet.