User Manual

11-2 EP7309/11/12 Users Manual - DS508UM4
Copyright Cirrus Logic, Inc. 2003
General Purpose I/O (GPIO)
11
Programming Example
;*******************************************************************
; Enable GPIO Port B as Outputs. Set pins 0-3 high 4-7 low
;*******************************************************************
DATADIR EQU 0xFF
PORTB EQU 0x0F
;
ldrb r1, =DATADIR
strb r1, [r12, #0x41] ; Set direction as output
ldrb r1, =PORTB
strb r1, [r12, #0x1] ; Set PORTB initial condition
;
Operational Overview
PADDR, PBDDR, an d PEDDR determine the direction of each of the GPIOs in their
respective port. If set, th e corresponding GPIO will be configured as an output. I f
cleared, th e GPIO is treated as an input.
PDDDR determines the direction of PORTD. Initial state is low (output). High sets
pins as inputs.
Values read from these register, when configured as i nputs, reflect th e external state of
the pin. Values written to these pins, i.e. logic 1, when configured as an output, will
cause the logic st ate change from 0 to 3.3 V DC. All bits are cleared by a system reset.
Multiplexed Pins
Port A can be used to detect a keyboard entry to generate on e of several internal
conditions as mentioned in the keyboard interface discussion.
PD6 and PD7 are multiplexed with SDRAM byte m asks SDQM0 and SDQM1
respectively.TobeusedasGPIOs,SYSCON3bit10mustbeset.
Port E, at power-on-reset, pins [1:0] are read during power-on-reset d etermi ne the
memory width of the boot ROM to the CP U . See the boot ROM discussion for m ore
details. After boot up, these pins are treated as GPIOs only.
Register Descriptions
See “General Purpose I/O (GPIO) R egister Li st” on p age 11-1 and Operational
Overview.