Manual

DS507F2 Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved) 27
EP7309
High-Performance, Low-Power System on Chip
73 VSSIO Pad Gnd
74 VDDIO Pad Pwr
75 DRIVE[1] I/O 2
High /
Low
76 DRIVE[0] I/O 2
High /
Low
77 ADCCLK O 1 Low
78 ADCOUT O 1 Low
79 SMPCLK O 1 Low
80 FB[1] I
81 VSSIO Pad Gnd
82 FB[0] I
83 COL[7] O 1 High
84 COL[6] O 1 High
85 COL[5] O 1 High
86 COL[4] O 1 High
87 COL[3] O 1 High
88 COL[2] O 1 High
89 VDDIO Pad Pwr
90 TCLK I
91 COL[1] O 1 High
92 COL[0] O 1 High
93 BUZ O 1 Low
94 D[31] I/O 1 Low
95 D[30] I/O 1 Low
96 D[29] I/O 1 Low
97 D[28] I/O 1 Low
98 VSSIO Pad Gnd
99 A[27] O 2 Low
100 D[27] I/O 1 Low
101 A[26] O 2 Low
102 D[26] I/O 1 Low
103 A[25] O 2 Low
104 D[25] I/O 1 Low
105 HALFWORD O 1 Low
106 A[24] O 1 Low
107 VDDIO Pad Pwr —
108 VSSIO Pad Gnd —
109 D[24] I/O 1 Low
Table 19. 208-Pin LQFP Numeric Pin Listing (Continued)
Pin
No.
Signal Type Strength
Reset
State
110 A[23] O 1 Low
111 D[23] I/O 1 Low
112 A[22] O 1 Low
113 D[22] I/O 1 Low
114 A[21] O 1 Low
115 D[21] I/O 1 Low
116 VSSIO Pad Gnd
117 A[20] O 1 Low
118 D[20] I/O 1 Low
119 A[19] O 1 Low
120 D[19] I/O 1 Low
121 A[18] O 1 Low
122 D[18] I/O 1 Low
123 VDDIO Pad Pwr
124 VSSIO Pad Gnd
125 nTRST I
126 A[17] O 1 Low
127 D[17] I/O 1 Low
128 A[16] O 1 Low
129 D[16] I/O 1 Low
130 A[15] O 1 Low
131 D[15] I/O 1 Low
132 A[14] O 1 Low
133 D[14] I/O 1 Low
134 A[13] O 1 Low
135 D[13] I/O 1 Low
136 A[12] O 1 Low
137 D[12] I/O 1 Low
138 A[11] O 1 Low
139 VDDIO Pad Pwr
140 VSSIO Pad Gnd
141 D[11] I/O 1 Low
142 A[10] O 1 Low
143 D[10] I/O 1 Low
144 A[9] O 1 Low
145 D[9] I/O 1 Low
146 A[8] O 1 Low
147 D[8] I/O 1 Low
Table 19. 208-Pin LQFP Numeric Pin Listing (Continued)
Pin
No.
Signal Type Strength
Reset
State