Manual

26 Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved) DS507F2
EP7309
High-Performance, Low-Power System on Chip
208-Pin LQFP Numeric Pin Listing
Table 19. 208-Pin LQFP Numeric Pin Listing
Pin
No.
Signal Type Strength
Reset
State
1nCS[5] O 1 High
2 VDDIO Pad Pwr
3 VSSIO Pad Gnd
4 EXPCLK I/O 1
5 WORD Out 1 Low
6 WRITE Out 1 Low
7 RUN/CLKEN O 1 Low
8 EXPRDY I 1
9 TXD[2] O 1 High
10 RXD[2] I
11 TDI I with p/u*
12 VSSIO Pad Gnd
13 PB[7] I/O 1 Input
14 PB[6] I/O 1 Input
15 PB[5] I/O 1 Input
16 PB[4] I/O 1 Input
17 PB[3] I/O 1 Input
18 PB[2] I/O 1 Input
19 PB[1]/PRDY2 I/O 1 Input
20 PB[0]/PRDY1 I/O 1 Input
21 VDDIO Pad Pwr
22 TDO O 1 Three state
23 PA[7] I/O 1 Input
24 PA[6] I/O 1 Input
25 PA[5] I/O 1 Input
26 PA[4] I/O 1 Input
27 PA[3] I/O 1 Input
28 PA[2] I/O 1 Input
29 PA[1] I/O 1 Input
30 PA[0] I/O 1 Input
31 LEDDRV O 1 Low
32 TXD[1] O 1 High
33 VSSIO Pad Gnd 1 High
34 PHDIN I
35 CTS I
36 RXD[1] I
37 DCD I
38 DSR I
39 nTEST[1] I With p/u*
40 nTEST[0] I With p/u*
41 EINT[3] I
42 nEINT[2] I
43 nEINT[1] I
44 nEXTFIQ I
45 PE[2]/CLKSEL I/O 1 Input
46
PE[1]/
BOOTSEL[1]
I/O 1 Input
47
PE[0]/
BOOTSEL[0]
I/O 1 Input
48 VSSRTC RTC Gnd
49 RTCOUT O
50 RTCIN I
51 VDDRTC RTC power
52 N/C
53 PD[7] I/O 1 Low
54 PD[6] I/O 1 Low
55 PD[5] I/O 1 Low
56 PD[4] I/O 1 Low
57 VDDIO Pad Pwr
58 TMS I with p/u*
59 PD[3] I/O 1 Low
60 PD[2] I/O 1 Low
61 PD[1] I/O 1 Low
62 PD[0]/LEDFLSH I/O 1 Low
63 SSICLK I/O 1 Input
64 VSSIO Pad Gnd
65 SSITXFR I/O 1 Low
66 SSITXDA O 1 Low
67 SSIRXDA I
68 SSIRXFR I/O Input
69 ADCIN I
70 nADCCS O 1 High
71 VSSCORE Core Gnd
72 VDDCORE Core Pwr
Table 19. 208-Pin LQFP Numeric Pin Listing (Continued)
Pin
No.
Signal Type Strength
Reset
State