Instruction Manual

118 DS271F5
CS8900A
Crystal LAN™ Ethernet Controller
CIRRUS LOGIC PRODUCT DATASHEET
SWITCHING CHARACTERISTICS (Continued)
Parameter Symbol Min Typ Max Unit
10BASE-T Receive
Allowable Received Jitter at Bit Cell Center t
TRX1
--±13.5ns
Allowable Received Jitter at Bit Cell Boundary t
TRX2
--±13.5ns
Carrier Sense Assertion Delay t
TRX3
-540-ns
Invalid Preamble Bits after Assertion of Carrier Sense t
TRX4
1-2bits
Carrier Sense Deassertion Delay t
TRX5
-270-ns
10BASE-T Link Integrity
First Transmitted Link Pulse after Last Transmitted Packet t
LN1
81624ms
Time Between Transmitted Link Pulses t
LN2
81624ms
Width of Transmitted Link Pulses t
LN3
60 100 200 ns
Minimum Received Link Pulse Separation t
LN4
2-7ms
Maximum Received Link Pulse Separation t
LN5
25 - 150 ms
Last Receive Activity to Link Fail (Link Loss Timer) t
LN6
50 - 150 ms
t
TRX3
RXD±
t
TRX5
t
TRX4
t
TRX1
t
TRX2
Carrier Sense (internal)
Figure 42. 10BASE-T Receive
RXD±
LINKLED
TXD±
t
LN1
t
LN2
t
LN3
t
LN4
t
LN5
t
LN6
Figure 43. 10BASE-T Link Integrity