User guide

8 DS578F3
CS8416
SWITCHING CHARACTERISTICS
(Inputs: Logic 0 = 0 V, Logic 1 = VL; C
L
= 20 pF)
Notes:
5. Typical RMS cycle-to-cycle jitter.
6. Duty cycle when clock is recovered from biphase encoded input.
7. Duty cycle when OMCK is switched over for output on RMCK.
Parameter Symbol Min Typ Max Units
RST Pin Low Pulse Width 200 - - μS
PLL Clock Recovery Sample Rate Range 30 - 200 kHz
RMCK Output Jitter (Note 5) -200-ps RMS
RMCK Output Duty-Cycle (Note 6)
(Note 7)
45
50
50
55
55
65
%
%
RMCK/OMCK Maximum Frequency - - 50 MHz