User Manual

CS61880
DS450PP3 27
10.4 Receiver Powerdown/High-Z
All eight receivers are powered down when MCLK
is held low. In addition, this will force the RCLK,
RPOS/RDATA and RNEG outputs into a high im-
pedance state.
10.5 Loss-of-Signal (LOS)
The CS61880 makes use of both analog and digital
LOS detection circuitry that is compliant to the lat-
est specifications. The LOS condition can be set to
either ITU G.775 or ETSI 300 233. This change is
done through the LOS/AIS Mode Enable Regis-
ter (0Dh) (See Section 14.14 on page 37).
The LOS detector increments a counter each time a
zero is received, and resets the counter each time a
one “mark” is received. Depending on LOS detec-
tion mode, the LOS signal is set when a certain
number of consecutive zeros are received. In
Clock/Data recovery mode, this forces the recov-
ered clock to be replaced by MCLK at the RCLK
output. In addition the RPOS/RDATA and RNEG
outputs remain active for the length of the LOS pe-
riod, except when local and analog loopbacks are
enabled. Upon exiting LOS, the recovered clock re-
places MCLK on the RCLK output. In Data recov-
ery mode, RCLK is not replaced by MCLK when
LOS is active. The LOS detection modes are sum-
marized below.
NOTE: G.775 and ETSI 300 233 are both available in
host mode, but in hardware mode only ETSI
300 233 is available.
ITU G.775 (E1 Mode Only) - LOS is declared
when the received signal level is less than 200 mV
for 32 consecutive pulse periods (typical). The de-
vice exits LOS when the received signal achieves
12.5% ones density with no more than 15 consecu-
tive zeros in a 32-bit sliding window and the signal
level exceeds 250 mV.
ETSI 300 233 (E1 Host Mode Only) - The LOS
indicator becomes active when the receive signal
level drops below 200 mV for more than 2048
pulse periods (1 ms). The channel exits the LOS
state when the input signal exceeds 250 mV and
has transitions for more than 32 pulse periods
(16 µs). This LOS detection method can only be se-
lected while in host mode.
During host mode operation, LOS is reported in the
LOS Status Monitor Register. Both the LOS pins
and the register bits reflect LOS status in host mode
operation. The LOS pins and status bits are set high
(indicating loss of signal) during reset, power-up,
or channel powered-down.
10.6 Alarm Indication Signal (AIS)
The CS61880 detects all ones alarm condition per
the relevant ITU, and ETSI specifications. In gen-
eral, AIS is indicated when the one’s density of the
receive signal exceeds that dictated by the relevant
specification. This feature is only available in host
mode (Refer to LOS/AIS Mode Enable Register
(0Dh) (See Section 14.14 on page 37)).
ITU G.775 AIS (E1 Mode) - The AIS condition is
declared when less than 3 zeros are received within
two consecutive 512-bit windows. The AIS condi-
tion is cleared when 3 or more zeros are received in
two consecutive 512-bit windows.
ETSI 300 233 (E1 Mode) - The AIS condition is
declared when less than 3 zeros are received in a
512-bit window. The AIS condition is cleared
when a 512-bit window is received containing 3 or
more zeros.