User guide

CS5480
DS980F3 37
6.6 Register Descriptions
22. “Default” = bit states after power-on or reset
23. DO NOT write a “1” to any unpublished register bit or to a bit published as “0”.
24. DO NOT write a “0” to any bit published as “1”.
25. DO NOT write to any unpublished register address.
6.6.1 Configuration 0 (Config0) – Page 0, Address 0
Default = 0xC0 2000
[23:9] Reserved.
INT_POL Interrupt Polarity.
0 = Active low (Default)
1 = Active high
I2PGA[1:0] Select PGA gain for I2 channel.
00 = 10x gain (Default)
10 = 50x gain
I1PGA[1:0] Select PGA gain for I1 channel.
00 = 10x gain (Default)
10 = 50x gain
[3] Reserved.
NO_OSC Disable crystal oscillator (making XIN a logic-level input).
0 = Crystal oscillator enabled (Default)
1 = Crystal oscillator disabled
IZX_CH Select current channel for zero-cross detect.
0 = Selects current channel 1 for zero-cross detect (Default)
1 = Selects current channel 2 for zero-cross detect
[0] Reserved.
23 22 21 20 19 18 17 16
1100- -- -
15 14 13 12 11 10 9 8
-0100--INT_POL
76543210
I2PGA[1] I2PGA[0] I1PGA[1] I1PGA[0] - NO_OSC IZX_CH -