User guide

CS5480
34 DS980F3
51** 11 0011 SampleCount Sample Count N Y 0x 00 0FA0
52 11 0100 - Reserved -
53 11 0101 - Reserved -
54* 11 0110 T
GAIN
Temperature Gain Y Y 0x 06 B716
55* 11 0111 T
OFF
Temperature Offset Y Y 0x D5 3998
56* 11 1000 P
MIN
(IRMS
MIN
) Channel Select Minimum Amplitude Y Y 0x 00 624D
57 11 1001 T
SETTLE
Filter Settling Time to Conv. Startup Y Y 0x 00 001E
58* 11 1010 Load
MIN
No Load Threshold Y Y 0x 00 0000
59* 11 1011 VF
RMS
Voltage Fixed RMS Reference Y Y 0x 5A 8279
60* 11 1100 SYS
GAIN
System Gain N Y 0x 50 0000
61 11 1101 Time System Time (in samples) N Y 0x 00 0000
62 11 1110 - Reserved -
63 11 1111 - Reserved -
Notes: (1) Warning: Do not write to unpublished or reserved register locations.
(2) * Registers with checksum protection.
** When setting the AVG_MODE bit (AVG_MODE = ‘1’) in the Config2 register, the device will
use the Line-cycle Synchronized Averaging mode and the CycleCount register will be includ-
ed in the checksum. Otherwise the SampleCount register will be included.
(3) Registers that can be set to write protect from DSP and/or HOST.