Owner manual

CS5466
DS659F2 7
DIGITAL CHARACTERISTICS (Note 7)
• Min / Max characteristics and specifications are guaranteed over all operating conditions.
• Typical characteristics and specifications are measured at nominal supply voltages and TA = 25 °C.
• VA+ = 5 V ±5% VD+ = 3.3 V ±5% or 5 V ±5%; AGND = DGND = 0 V. All voltages with respect to 0 V.
• MCLK = 4.096 MHz
Notes: 7. All measurements performed under static conditions.
8. If external MCLK is used, then the duty cycle must be between 45% and 55% to maintain this specification.
9. The frequency of CPUCLK is equal to MCLK.
10. V
OL
and V
OH
are not specified under this condition.
Parameter Symbol Min Typ Max Unit
Master Clock Characteristics
Master Clock Frequency Internal Gate Oscillator MCLK 3 4.096 5 MHz
Master Clock Duty Cycle - 40 - 60 %
CPUCLK Duty Cycle (Note 8 and 9) - 40 - 60 %
Filter Characteristics
High-pass Filter Corner Frequency -3 dB - - 0.125 - Hz
Input/Output Characteristics
High-level Input Voltage
XIN
RESET
V
IH
(VD+) - 0.5
0.8VD+
-
-
-
-
V
V
Low-level Input Voltage (VD = 5 V)
XIN
RESET
V
IL
-
-
-
-
1.5
0.2VD+
V
V
Low-level Input Voltage (VD = 3.3 V)
XIN
RESET
V
IL
-
-
-
-
0.3
0.2VD+
V
V
High-level Output Voltage (except XOUT) I
out
= +5 mA V
OH
(VD+) - 1.0 - - V
Low-level Output Voltage (except XOUT) I
out
= -5 mA V
OL
--0.4V
Input Leakage Current I
in
-±1±10µA
Digital Output Pin Capacitance C
out
-5-pF
Drive Current FOUT, E1
, E2, NEG (Note 10) I
DR
-50-mA