Manual

CS5378
DS639F3 70
20.1.4 SPIDAT2 : 0x09, 0x0A, 0x0B
(MSB) 23 22 21 20 19 18 17 16
SDAT23 SDAT22 SDAT21 SDAT20 SDAT19 SDAT18 SDAT17 SDAT16
R/WR/WR/WR/WR/WR/WR/WR/W
00000000
15 14 13 12 11 10 9 8
SDAT15 SDAT14 SDAT13 SDAT12 SDAT11 SDAT10 SDAT9 SDAT8
R/WR/WR/WR/WR/WR/WR/WR/W
00000000
7654321(LSB) 0
SDAT7 SDAT6 SDAT5 SDAT4 SDAT3 SDAT2 SDAT1 SDAT0
R/WR/WR/WR/WR/WR/WR/WR/W
00000000
SPI Address: 0x09
0x0A
0x0B
-- Not defined;
read as 0
R Readable
WWritable
R/W Readable and
Writable
Bits in bottom rows
are reset condition
Figure 42. SPI Data Register SPIDAT2
Bit definitions:
23:16 SDAT[23:16] SPI Data
High Byte
15:8 SDAT[15:8] SPI Data
Middle Byte
15:8 SDAT[7:0] SPI Data
Low Byte