User Manual

ManualsBrandsCirrus Logic ManualsHardwareCS5351

http://www.cirrus.com

108 dB, 192 kHz, Multi-bit Audio A/D Converter

Features

 Advanced Multi-bit Delta-Sigma Architecture

 24-bit Conversion

 108 dB Dynamic Range

 -98 dB THD+N

 System Sampling Rates up to 192 kHz

 135 mW Power Consumption

 High-Pass Filter and DC Offset Calibration

 Supports Logic Levels Between 5 and 2.5 V

 Single-Ended Analog Inputs

 Overflow Detection

 Pin Compatible with the CS5361

General Description

The CS5351 is a complete analog-to-digital converter

for digital audio systems. It performs sampling, analog-

to-digital conversion, and anti-alias filtering. The device

generates 24-bit values for both left and right inputs in

serial form at sample rates up to 192 kHz per channel.

The CS5351 uses a 5th-order, multi-bit, delta-sigma

modulator followed by digital filtering and decimation,

which removes the need for an external anti-alias filter.

The ADC uses a differential architecture which provides

excellent noise rejection.

The CS5351 is ideal for audio systems requiring wide

dynamic range, negligible distortion, and low noise.

Such applications include A/V receivers, DVD-R, CD-R,

digital mixing consoles, and effects processors.

ORDERING INFORMATION

CS5351-KSZ, Lead Free -10° to 70°C 24-pin SOIC

CS5351-KZZ, Lead Free -10° to 70°C 24-pin TSSOP

CS5351-DZZ, Lead Free -40° to 85°C 24-pin TSSOP

CDB5351 Evaluation Board

Voltage Reference

Serial Output Interface

Digital

Filter

High

Pass

Filter

High

Pass

Filter

Decimation

Digital

Filter

Decimation

DAC

S/H

DAC

S/H

AINR

SCLK

SDOUT MCLK

RST

VQ3

LRCK

AINL

FILT+

I²S/LJ

M/S

HPF

MODE0

MODE1

REFGND

MDIV

LP Filter

ΔΣ

OVFL

VQ1

VQ2

MAY '07

DS565F2

CS5351

Summary of content (23 pages)

PAGE 1
CS5351 108 dB, 192 kHz, Multi-bit Audio A/D Converter Features General Description Advanced Multi-bit Delta-Sigma Architecture The CS5351 is a complete analog-to-digital converter for digital audio systems. It performs sampling, analogto-digital conversion, and anti-alias filtering. The device generates 24-bit values for both left and right inputs in serial form at sample rates up to 192 kHz per channel.
PAGE 2
CS5351 TABLE OF CONTENTS 1. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 4 SPECIFIED OPERATING CONDITIONS .............................................................................................. 4 ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 4 ANALOG CHARACTERISTICS (CS5351-KSZ/KZZ) ............................................................
PAGE 3
CS5351 LIST OF FIGURES Figure 1. Single-Speed Mode Stopband Rejection ..................................................................................... 8 Figure 2. Single-Speed Mode Transition Band ........................................................................................... 8 Figure 3. Single-Speed Mode Transition Band (Detail) ............................................................................... 8 Figure 4. Single-Speed Mode Passband Ripple .....................................
PAGE 4
CS5351 1. CHARACTERISTICS AND SPECIFICATIONS (All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical performance characteristics and specifications are derived from measurements taken at typical supply voltages and TA = 25°C.) SPECIFIED OPERATING CONDITIONS (GND = 0 V, all voltages with respect to 0 V.) Parameter Symbol Min Typ Max Unit Positive Analog Positive Digital Positive Logic VA VD VL 4.75 3.1 2.37 5.0 3.3 3.3 5.25 5.25 5.
PAGE 5
CS5351 ANALOG CHARACTERISTICS (CS5351-KSZ/KZZ) (Test conditions (unless otherwise specified): Input test signal is a 1 kHz sine wave; measurement bandwidth is 10 Hz to 20 kHz.) Parameter Single-Speed Mode Dynamic Range Symbol Min Typ Max Unit 102 99 108 105 - dB dB - -98 -84 -44 -92 - dB dB dB 102 99 - 108 105 102 - dB dB dB - -98 -84 -44 -95 -92 - dB dB dB dB 102 99 - 108 105 102 - dB dB dB - -98 -84 -44 -95 -92 - dB dB dB dB - 95 - dB -2 -100 - 0.
PAGE 6
CS5351 ANALOG CHARACTERISTICS (CS5351-DZZ) (Test conditions (unless otherwise specified): Input test signal is a 1 kHz sine wave; measurement bandwidth is 10 Hz to 20 kHz.
PAGE 7
CS5351 DIGITAL FILTER CHARACTERISTICS Parameter Symbol Min Typ Max Unit (Note 5) 0 - 0.47 Fs -0.1 - 0.035 dB (Note 5) 0.58 - - Fs -95 - - dB - 12/Fs - s - 0.0001 - Deg 0 - 0.45 Fs -0.1 - 0.035 dB Single-Speed Mode (2 kHz to 51 kHz sample rates) Passband (-0.1 dB) Passband Ripple Stopband Stopband Attenuation Total Group Delay (Fs = Output Sample Rate) tgd Interchannel Phase Deviation Double-Speed Mode (50 kHz to 102 kHz sample rates) Passband (-0.
PAGE 8
0 0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 Amplitude (dB) Amplitude (dB) CS5351 -60 -70 -80 -60 -70 -80 -90 -90 -100 -100 -110 -110 -120 -120 -130 -130 -140 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -140 0.40 1.0 Frequency (normalized to Fs) 0.42 0.44 0.46 0.48 0.50 0.52 0.54 0.56 0.58 0.60 Frequency (normalized to Fs) Figure 1. Single-Speed Mode Stopband Rejection Figure 2. Single-Speed Mode Transition Band 0.10 0 -1 0.08 -2 0.
PAGE 9
CS5351 0 0.10 -1 0.08 -2 0.05 0.03 -4 Amplitude (dB) Amplitude (dB) -3 -5 -6 0.00 -0.03 -7 -0.05 -8 -0.08 -9 -10 0.40 0.43 0.45 0.48 0.50 0.53 -0.10 0.00 0.55 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 Frequency (normalized to Fs) Frequency (normalized to Fs) Figure 8. Double-Speed Mode Passband Ripple Amplitude (dB) Amplitude (dB) Figure 7.
PAGE 10
CS5351 DC ELECTRICAL CHARACTERISTICS (GND = 0 V, all voltages with respect to ground. MCLK=12.288 MHz; Master Mode) Parameter Symbol Min Typ Max Unit VA = 5 V VL,VD = 5 V VL,VD = 3.3 V IA ID ID - 17.5 22 14.5 21.5 27.5 17 mA mA mA VA = 5 V VL,VD = 5 V IA ID - 100 100 - μA μA VA, VD, VL = 5 V VA = 5 V, VL, VD = 3.
PAGE 11
CS5351 SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT (Logic "0" = GND = 0 V; Logic "1" = VL, CL = 20 pF) Parameter Symbol Min Typ Max Unit Fs Fs Fs 2 50 100 - 51 102 204 kHz kHz kHz OVFL to LRCK edge setup time tsetup 16/fsclk - - s OVFL to LRCK edge hold time thold 1/fsclk - - s - 740 680 - ms ms 38 - 1953 ns 40 50 60 % Output Sample Rate Single-Speed Mode Double-Speed Mode Quad-Speed Mode OVFL time-out on overrange condition Fs = 44.1, 88.2, 176.
PAGE 12
CS5351 SCLK output CLK input tmslr LRCK input tsdo t dss MSB SDOUT tsclkw t slrd LRCK output MSB-1 MSB SDOUT Figure 13. Master Mode, Left-Justified SAI MSB-1 MSB-2 Figure 14. Slave Mode, Left-Justified SAI SCLK input SCLK input tsclkw t slrd LRCK input tsclkw t slrd LRCK input t dss MSB SDOUT t dss MSB-1 MSB SDOUT Figure 15. Master Mode, I²S SAI MSB-1 Figure 16. Slave Mode, I²S SAI LRCK t setup t hold OVFL Figure 17.
PAGE 13
CS5351 LRCK Left Channel Right Channel SCLK SDATA 23 22 9 8 7 6 5 4 3 2 1 0 23 22 9 8 7 6 5 4 3 2 1 0 23 22 Figure 18. Left-Justified Serial Audio Interface LRCK Left Channel Right Channel SCLK SDATA 23 22 9 8 7 6 5 4 3 2 1 0 23 22 9 8 7 6 5 4 3 2 1 0 23 22 Figure 19. I²S Serial Audio Interface LRCK SCLK O VFL O VFL_R O VFL_L O VFL_R Figure 20. OVFL Output Timing, I²S Format LR CK SCLK OVFL O VFL_R O VFL_L O VFL_R Figure 21.
PAGE 14
CS5351 2. PIN DESCRIPTIONS RST M/S LRCK SCLK MCLK VD GND VL SDOUT MDIV HPF I²S/LJ 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 FILT+ REFGND VQ3 AINR VQ2 VA GND VQ1 AINL OVFL M1 M0 Pin Name # Pin Description RST 1 Reset (Input) - The device enters a low power mode when low. M/S 2 Master/Slave Mode (Input) - Selects operation as either clock master or slave.
PAGE 15
CS5351 3. TYPICAL CONNECTION DIAGRAM +5 V to 3.3 V +5V + 1 μF + 0.01 μF * 1 μF 0.01 μF + VD +5V to 2.5V 1 μF VL FILT+ VL 0.01 μF REFGND Analog Input Buffer (Figure 24) + 0.01 μF 5.1 Ω VA 47 μF 0.01 μF 10 kΩ AINL VQ1 CS5351 VQ3 A/D CONVERTER OVFL RST I 2S/LJ M/S HPF M0 M1 MDIV Power Down and Mode Settings VQ2 AINR SDOUT Audio Data Processor LRCK SCLK MCLK GND GND Timing Logic and Clock * Resistor may only be used if VD is derived from VA.
PAGE 16
CS5351 4. APPLICATIONS 4.1 Operational Mode/Sample Rate Range Select The output sample rate, Fs, can be adjusted from 2 kHz to 204 kHz. The CS5351 must be set to the proper speed mode via the mode pins, M1 and M0. Refer to Table 1. M1 (Pin 14) 0 0 1 1 M0 (Pin 13) 0 1 0 1 MODE Single-Speed Mode Double-Speed Mode Quad-Speed Mode Reserved Output Sample Rate (Fs) 2 kHz - 51 kHz 50 kHz - 102 kHz 100 kHz - 204 kHz Table 1. CS5351 Mode Control 4.
PAGE 17
CS5351 4.2.2 Master Mode In Master Mode, LRCK and SCLK operate as outputs. The left/right and serial clocks are internally derived from the master clock with the left/right clock equal to Fs and the serial clock equal to 64x Fs, as shown in Figure 23. Refer to Table 3 for common master clock frequencies.
PAGE 18
CS5351 4.4 Analog Connections The analog modulator samples the input at 6.144 MHz. The digital filter will reject signals within the stopband of the filter. However, there is no rejection for input signals which are (n × 6.144 MHz) the digital passband frequency, where n=0,1,2,...Refer to Figure 24 which shows the suggested filter that will attenuate any noise energy at 6.144 MHz, in addition to providing the optimum source impedance for the modulators.
PAGE 19
CS5351 4.6 Overflow Detection The CS5351 includes overflow detection on both the left and right channels. This time multiplexed information is presented as open drain, active low on pin 15, OVFL. The OVFL_L and OVFL_R data will go to a logical low as soon as an overrange condition in either channel is detected. The data will remain low as specified in the Switching Characteristics - Serial Audio Port section. This ensures sufficient time to detect an overrange condition regardless of the speed mode.
PAGE 20
CS5351 5. PARAMETER DEFINITIONS Dynamic Range The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified bandwidth. Dynamic Range is a signal-to-noise ratio measurement over the specified bandwidth made with a -60 dBFS signal. 60 dB is added to resulting measurement to refer the measurement to full-scale. This technique ensures that the distortion components are below the noise level and do not affect the measurement.
PAGE 21
CS5351 6. PACKAGE DIMENSIONS 24L SOIC (300 MIL BODY) PACKAGE DRAWING E H 1 b c ∝ D L SEATING PLANE A e A1 INCHES DIM A A1 B C D E e H L ∝ DS565F2 MIN 0.093 0.004 0.013 0.009 0.598 0.291 0.040 0.394 0.016 0° MAX 0.104 0.012 0.020 0.013 0.614 0.299 0.060 0.419 0.050 8° MILLIMETERS MIN MAX 2.35 2.65 0.10 0.30 0.33 0.51 0.23 0.32 15.20 15.60 7.40 7.60 1.02 1.52 10.00 10.65 0.40 1.
PAGE 22
CS5351 24L TSSOP (4.4 mm BODY) PACKAGE DRAWING N D E11 A2 E e b2 SIDE VIEW A ∝ A1 L END VIEW SEATING PLANE 1 2 3 TOP VIEW DIM A A1 A2 b D E E1 e L µ MIN -0.002 0.03346 0.00748 0.303 0.248 0.169 -0.020 0° INCHES NOM -0.004 0.0354 0.0096 0.307 0.2519 0.1732 0.026 BSC 0.024 4° MAX 0.043 0.006 0.037 0.012 0.311 0.256 0.177 -0.028 8° MIN -0.05 0.85 0.19 7.70 6.30 4.30 -0.50 0° MILLIMETERS NOM --0.90 0.245 7.80 6.40 4.40 0.65 BSC 0.60 4° NOTE MAX 1.10 0.15 0.95 0.30 7.90 6.50 4.50 -0.
PAGE 23
CS5351 7. REVISION HISTORY Release PP2 F1 Changes Preliminary datasheet. Improve Gain Error specification under Analog Characteristics. Specify Full-scale Input Voltage in terms of VA under Analog Characteristics. Update Differential Input Impedance under Analog Characteristics. Increase maximum Power-Supply Current, IA, under DC Electrical Characteristics. Reduce maximum Power Consumption under DC Electrical Characteristics. Update FILT+ Output Impedance specification under DC Electrical Characteristics.