Manual

14 DS861PP3
CS5346
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT
Logic ‘0’ = DGND = AGND = 0 V; Logic ‘1’ = VLS, C
L
= 20 pF. (Note 12)
12. See Figure 1 and Figure 2 on page 15.
Parameter Symbol Min Typ Max Unit
Sample Rate Single-Speed Mode
Double-Speed Mode
Quad-Speed Mode
Fs
Fs
Fs
8
50
100
-
-
-
50
100
200
kHz
kHz
kHz
MCLK Specifications
MCLK Frequency fmclk 2.048 - 51.200 MHz
MCLK Input Pulse Width High/Low t
clkhl 8--ns
Master Mode
LRCK Duty Cycle - 50 - %
SCLK Duty Cycle - 50 - %
SCLK falling to LRCK edge t
slr
-10 - 10 ns
SCLK falling to SDOUT valid t
sdo
0-36ns
Slave Mode
LRCK Duty Cycle 40 50 60 %
SCLK Period
Single-Speed Mode
Double-Speed Mode
Quad-Speed Mode
t
sclkw
t
sclkw
t
sclkw
-
-
-
-
-
-
ns
ns
ns
SCLK Pulse Width High t
sclkh
30 - - ns
SCLK Pulse Width Low t
sclkl
48 - - ns
SCLK falling to LRCK edge t
slr
-10 - 10 ns
SCLK falling to SDOUT valid t
sdo
0-36ns
10
9
128Fs
---------------------
10
9
64Fs
------------------
10
9
64Fs
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