User guide

Digital Audio Output Port Description
CS4953x4/CS4970x4 System Designer’s Guide
DS810UM6 Copyright 2013 Cirrus Logic, Inc 4-5
Table 4-2 shows values and messages for DAO output clock mode configuration parameters.
Please refer to the Table 4-3, Table 4-4, Table 4-5, Table 4-6, and Table 4-7 for a visual example of the
clocking directions for the settings in Table 4-2.
Table 4-3 shows values and messages for the data format configuration parameters.
Table 4-4 shows values and messages for the output DAO_SCLK/LRCLK frequency configuration
parameter.
Table 4-2. Output Clock Mode Configuration (Parameter A)
A
Value
DAO 1 & 2 Modes (MCLK, LRCLK and SCLK) Hex Message
0
(default)
DAO_MCLK - Slave
DAO1_LRCLK - Slave
DAO1_SCLK - Slave
DAO2_LRCLK - Slave
DAO2_SCLK - Slave
0x8140002C
0x00002000
0x8100002D
0x00002000
1
DAO_MCLK - Slave
DAO1_LRCLK - Master
DAO1_SCLK - Master
DAO2_LRCLK - Master
DAO2_SCLK - Master
0x8180002C
0xFFFFDFFF
0x8180002D
0xFFFFDFFF
2
DAO_MCLK - Slave
DAO1_LRCLK - Slave
DAO1_SCLK - Slave
DAO2_LRCLK - Master
DAO2_SCLK - Master
0x8140002C
0x00002000
0x8180002D
0xFFFFDFFF
Table 4-3. DAO1 & DAO2 Clocking Relationship Configuration (Parameter B)
B
Value
DAO1 & DAO2 Clocking Relationship Hex Message
0 (default)
DAO2 dependent on DAO1 clocks
* DA02_LRCLK & DA02_SCLK are driven by
DA01_LRCLK & DA01_SCLK
0x8140002B
0x00002000
1 DAO2 independent of DAO1 clocks
0x8180002B
0xFFFFDFFF
Table 4-4. Output DAO_SCLK/LRCLK Configuration (Parameter C)
C Value DAO_SCLK Frequency Hex Message
0 (default)
DAO_MCLK = 256 FS
DAO1_SCLK = DAO_MCLK / 4 = 64 FS
DAO1_LRCLK = DAO1_SCLK / 64 = FS
DAO2_SCLK = DAO_MCLK / 4 = 64 FS
DAO2_LRCLK = DAO2_SCLK / 64 = FS
0x8100003D
0x00007711
0x8100003E
0x00007711
0x8180002C
0xFFFFFF8F
0x8140002C
0x00000020
1
DAO_MCLK = 256 FS
DAO1_SCLK = DAO_MCLK / 2 = 128 FS
DAO1_LRCLK = DAO1_SCLK / 128 = FS
DAO2_SCLK = DAO_MCLK / 2= 128 FS
DAO2_LRCLK = DAO2_SCLK / 128 = FS
0x8100003D
0x00017701
0x8100003E
0x00017701
0x8180002C
0xFFFFFF8F
0x8140002C
0x00000040