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CS4953x4 Pin Assignments

CS4953x4/CS4970x4 System Designer’s Guide

108 - GPIO41

General Purpose Input/

Output

1. PCP_IRQ

2. SCP2_IRQ

1. Parallel Control Port Data Ready

Interrupt Request

2. Serial Control Port Data Ready

Interrupt Request

3.3V (5V

tol)

BiDir/OD IN Y

109 - GPIO9

General Purpose Input/

Output

1. PCP_A1

2. PCP_A9

1. Parallel Control Port Address Bit 1

2. Parallel Control Port Address Bit 9

3.3V (5V

tol)

BiDir IN Y

-4GPIO9

General Purpose Input/

Output

1. SCP1_IRQ

1. Serial Control Port Data Ready

Interrupt Request

3.3V (5V

tol)

BiDir IN Y

110 - GPIO8

General Purpose Input/

Output

1. PCP_A0

2. PCP_A8

1. Parallel Control Port Address Bit 0

2. Parallel Control Port Address Bit 8

3.3V (5V

tol)

BiDir IN Y

-5GPIO8

General Purpose Input/

Output

1. SCP2_IRQ

1. Serial Control Port Data Ready

Interrupt Request

3.3V (5V

tol)

BiDir IN Y

111 - GPIO7

General Purpose Input/

Output

1. PCP_D7

2. PCP_AD7

1. Parallel Control Port Data Bus

2. Parallel Control Port Multiplexed

Address and Data Bus

3.3V (5V

tol)

BiDir IN Y

-6GPIO7

General Purpose Input/

Output

1. SCP1_CS

2. IOWAIT

1. SPI Chip Select

2. SRAM Hold-Off Handshake

3.3V (5V

tol)

BiDir IN Y

112 - GPIO6

General Purpose Input/

Output

1. PCP_D6

2. PCP_AD6

1. Parallel Control Port Data Bus

2. Parallel Control Port Multiplexed

Address and Data Bus

3.3V (5V

tol)

BiDir IN Y

-7GPIO6

General Purpose Input/

Output

1. SCP2_CS

1. SPI Chip Select

3.3V (5V

tol)

BiDir IN Y

113 8 VDDIO7 I/O power supply voltage 3.3V PWR

114 - GPIO5

General Purpose Input/

Output

1. PCP_D5

2. PCP_AD5

1. Parallel Control Port Data Bus

2. Parallel Control Port Multiplexed

Address and Data Bus

3.3V (5V

tol)

BiDir IN Y

115 - GPIO4

General Purpose Input/

Output

1. PCP_D4

2. PCP_AD4

1. Parallel Control Port Data Bus

2. Parallel Control Port Multiplexed

Address and Data Bus

3.3V (5V

tol)

BiDir IN Y

116 9 GNDIO7 I/O ground 0V PWR

117 - GPIO3

General Purpose Input/

Output

1. PCP_D3

2. PCP_AD3

1. Parallel Control Port Data Bus

2. Parallel Control Port Multiplexed

Address and Data Bus

3.3V (5V

tol)

BiDir IN Y

-10GPIO3

General Purpose Input/

Output

3.3V (5V

tol)

BiDir IN Y

118 - GPIO2

General Purpose Input/

Output

1. PCP_D2

2. PCP_AD2

1. Parallel Control Port Data Bus

2. Parallel Control Port Multiplexed

Address and Data Bus

3.3V (5V

tol)

BiDir IN Y

Table P-11. CS4953x4 Pin Assignments (Continued) for 144-Pin and 128-Pin Packages (Continued)

LQFP-

144

Pin #

LQFP-

128

Pin #

Function 1

(Default)

Description of Default

Function

Secondary Functions Description of Secondary

Functions

Pwr Type

Reset

State

Pullup

at

Reset