User guide

DS810UM6 Copyright 2013 Cirrus Logic P-21
CS4953x4 Pin Assignments
CS4953x4/CS4970x4 System Designer’s Guide
38 66 EXT_WE Flash Write Enable
3.3V (5V
tol)
OUT
39 68 SD_D0 SDRAM Data Bit 0 EXT_D0 Flash Data Bit 0
3.3V (5V
tol)
BiDir IN Y
40 69 SD_D15 SDRAM Data Bit 15 EXT_D15 Flash Data Bit 15
3.3V (5V
tol)
BiDir IN Y
41 70 SD_D14 SDRAM Data Bit 14 EXT_D14 Flash Data Bit 14
3.3V (5V
tol)
BiDir IN Y
42 71 SD_D13 SDRAM Data Bit 13 EXT_D13 Flash Data Bit 13
3.3V (5V
tol)
BiDir IN Y
43 72 SD_D12 SDRAM Data Bit 12 EXT_D12 Flash Data Bit 12
3.3V (5V
tol)
BiDir IN Y
44 73 VDDIO3 I/O power supply voltage 3.3V PWR
45 74 SD_D11 SDRAM Data Bit 11 EXT_D11 Flash Data Bit 11
3.3V (5V
tol)
BiDir IN Y
46 75 SD_D10 SDRAM Data Bit 10 EXT_D10 Flash Data Bit 10
3.3V (5V
tol)
BiDir IN Y
47 76 GNDIO3 I/O ground 0V PWR
48 77 SD_D9 SDRAM Data Bit 9 EXT_D9 Flash Data Bit 9
3.3V (5V
tol)
BiDir IN Y
49 78 SD_D8 SDRAM Data Bit 8 EXT_D8 Flash Data Bit 8
3.3V (5V
tol)
BiDir IN Y
50 79 SD_DQM1 SDRAM Data Mask 1
3.3V (5V
tol)
OUT
51 80 SD_CLKOUT SDRAM Clock Output
3.3V (5V
tol)
OUT
52 81 SD_CLKIN SDRAM Clock Input
3.3V (5V
tol)
In Y
53 82 SD_CLKEN SDRAM Clock Enable
3.3V (5V
tol)
OUT
54 83 VDD3 Core power supply voltage 1.8V PWR
55 84 SD_A12 SDRAM Address Bit 12 EXT_A12 Flash Address Bit 12
3.3V (5V
tol)
OUT
56 85 SD_A11 SDRAM Address Bit 11 EXT_A11 Flash Address Bit 11
3.3V (5V
tol)
OUT
57 86 GNDD3 Core ground 0V PWR
Table P-11. CS4953x4 Pin Assignments (Continued) for 144-Pin and 128-Pin Packages (Continued)
LQFP-
144
Pin #
LQFP-
128
Pin #
Function 1
(Default)
Description of Default
Function
Secondary Functions Description of Secondary
Functions
Pwr Type
Reset
State
Pullup
at
Reset