Manual

DS732UM10 Copyright 2010 Cirrus Logic, Inc 9-18
Pin Assignments
CS4953xx Hardware User’s Manual
14 46 GPIO23
General Purpose
Input/Output
DAO2_LRCLK
Serial PCM Audio Sample
Rate Clock for the serial data
pins: (DAO2_DATA0,
DAO2_DATA1, DAO2_DATA2,
DAO2_DATA3).
3.3V
(5V tol)
BiDir IN Y
15 47 GPIO17
General Purpose
Input/Output
1. DAO1_DATA3
2. XMTA
1. Digital Audio Output 3.
2. S/PDIF Audio Output A.
3.3V
(5V tol)
BiDir IN Y
16 48 GPIO16
General Purpose
Input/Output
1. DAO1_DATA2
2. HS2
1. Digital Audio Output 2.
2. Hardware Strap Mode
Select.
3.3V
(5V tol)
BiDir IN Y
17 49 GPIO15
General Purpose
Input/Output
1. DAO1_DATA1
2. HS1
1. Digital Audio Output 1.
2. Hardware Strap Mode
Select.
3.3V
(5V tol)
BiDir IN Y
18 50 VDDIO1
I/O power supply
voltage
3.3V PWR
19 51 DAO1_DATA0 Digital Audio Output 0 HS0 Hardware Strap Mode Select.
3.3V
(5V tol)
BiDir IN
20 52 DAO1_SCLK PCM Audio Bit Clock
3.3V
(5V tol)
BiDir IN Y
21 53 GNDIO1 I/O ground 0V PWR
22 54 DAO1_LRCLK
PCM Audio Sample
Rate Clock
3.3V
(5V tol)
BiDir IN Y
23 - GPIO31
General Purpose
Input/Output
UART_CLK UART Clock.
3.3V
(5V tol)
BiDir IN Y
24 55 VDD2
Core power supply
voltage
1.8V PWR
25 - GPIO25
General Purpose
Input/Output
UART_TXD UART Output.
3.3V
(5V tol)
BiDir IN Y
26 - GPIO24
General Purpose
Input/Output
UART_RXD UART Input.
3.3V
(5V tol)
BiDir IN Y
27 56 GNDD2 Core ground 0V PWR
28 57 SD_DQM0 SDRAM Data Mask 0
3.3V
(5V tol)
OUT
Table 9-10. Pin Assignments (Continued)
LQFP-
144
Pin #
LQFP-
128
Pin #
Function 1
(Default)
Description of Default
Function
Secondary Functions Description of Secondary
Functions
Pwr Type
Reset
State
Pullup
at
Reset