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CONFIDENTIAL DS876F3

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CS48AU2B Data Sheet

CONFIDENTI

DRA

DELPHI

FEATURES

 World’s first cost-effective, high-performance 32-bit DSP

that is solely dedicated to enable Audyssey Laboratories

audio processing technologies for today’s high-volume

consumer electronic products

 Features: Audyssey Dynamic Volume

, Audyssey Dynamic

, Audyssey EQ

& Audyssey BassXT

/BassXT-TV

 Audyssey Dynamic Volume eliminates the need for

constant volume adjustments

 Audyssey Dynamic EQ enables a reference playback

experience at any desired playback level

 Audyssey EQ removes much of the distortion caused by

speaker enclosures and the typical room environment

producing greatly improved sound compared to similar

products without correction

 Audyssey BassXT and BassXT-TV are specifically

calibrated to enhance the physical bass response of each

product model

 Configurable Serial Audio Inputs/Outputs

— Maximum 32-bit @ 192 kHz

(Note: Audyssey Laboratories algorithms support 48 kHz,

44.1 kHz and 32 kHz)

— Integrated 192 kHz capable S/PDIF transmitter

 Integrated Clock Manager/PLL

— Can operate from external crystal, external oscillator

 Input Fs Auto Detection & Coefficient Loading

 Host Control & Boot via Serial Interface

 Support for Master (Self) Boot via Serial EEPROM for

single Fs applications (i.e. 48 kHz only via ADC input)

 Configurable GPIOs and External Interrupt Input

 1.8V Core and a 3.3V I/O that is tolerant to 5V input

 Low-power Mode

—“Energy Star

Ready” via low-power mode, 268 µW in

standby

32-bit

DSP

P X Y

Serial

Control 1

Multichannel

Audio Out

GPIO Debug

Watchdog

TMR1

TMR2

PLL

S/PDIF

Multichannel

Audio In

The brand new CS48AU2B device is still based on the same

high-performance 32-bit fixed point Digital Signal Processor

core but instead is equipped with much less memory, tailoring

it for more cost-effective applications which feature Audyssey

Laboratories audio processing technologies. Target

applications are:

— Digital Televisions

—iPod

Docking Stations

— Automotive Head Units (OEM and Aftermarket)

— Automotive Outboard Amplifiers (OEM and Aftermarket)

—Blu-ray

Disc Receivers

— Soundbars / Sound Projectors

The following Audyssey Laboratories algorithms are currently

supported on the CS48AU2B and more are in development:

While the individual Audyssey processing algorithms have

already been implemented on this DSP, the CS48AU2B is

programmed using the Cirrus proprietary DSP Composer

™

GUI development tool.

Processing chains combining both standard signal

processing blocks (Tone Control, Bass Management, etc.) in

combination with any combination of Audyssey Laboratories

technology algorithm blocks may be designed using a simple

drag-and-drop interface to create a custom signal flow

specific to your product model. The end result of this is a

software image that is down-loaded to the DSP via serial host

or SPI

) or via a serial master (self) boot.

Support for loading of the various Audyssey Laboratories

algorithm coefficient files supplied by Audyssey Laboratories

is easily supported via DSP Composer, enabling the

OEM/ODM to quickly be able to generate the necessary files

for the system microcontroller which have been custom

tailored for each specific model based on the measurement

and analysis performed by Audyssey Laboratories.

Ordering Information:

See page 21 for ordering information

Summary of content (26 pages)

PAGE 1
CS48AU2B Data Sheet FEATURES World’s first cost-effective, high-performance 32-bit DSP — Maximum 32-bit @ 192 kHz (Note: Audyssey Laboratories algorithms support 48 kHz, 44.
PAGE 2
EN D TI EL A L PH D I RA FT CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one nearest to you go to www.cirrus.com. IMPORTANT NOTICE FI D Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable.
PAGE 3
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology Table of Contents 1. Documentation Strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Licensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 4
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology List of Figures List of Tables EN D TI EL A L PH D I RA FT Figure 1. RESET Timing ......................................................................................................................................... 12 Figure 2. XTI Timing ............................................................................................................................................... 12 Figure 3.
PAGE 5
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 1. Documentation Strategy The CS48AU2B Data Sheet describes the CS48AU2B audio processor. This document should be used in conjunction with the following documents when evaluating or designing a system around the CS48AU2B of processors. Table 1.
PAGE 6
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 3. Code Overlays The suite of software available for the CS48AU2B consists of an operating system (OS) and a library of overlays. The overlays have been divided into three main groups called Matrix-processors, Virtualizer-processors, and Post-processors. All software components are defined below: 1.
PAGE 7
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology Table 2. Device and Firmware Selection Guide Suggested Application Channel Count Input/Output Package CS48AU2B-CQZ Digital TV Portable Audio Docking Station Portable DVD DVD Mini / Receiver Multimedia PC Speakers 8 Channel Car Audio DVD Receiver High-end Digital TV 12 channel Car Audio Up to 12 channel in /12 channel out 48-pin QFP EN D TI EL A L PH D I RA FT Device 4. Hardware Functional Description 4.
PAGE 8
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 4.2 On-chip DSP Peripherals 4.2.1 Digital Audio Input Port (DAI) The DAI port supports a wide variety of data input formats at sample rates (Fs) as high as 192 kHz. Up to 32-bit word lengths are supported. The DAI also supports a time division multiplexed (TDM) one-line data mode, that packs PCM audio on a single data line the total number possible depends on the ratio of SCLK to LRCLK. The CS48AU2B supports up to 8.
PAGE 9
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology (that is, host MCU present) a GPIO will be used to signal the host that the watchdog has expired and the DSP should be rebooted and re-configured. 4.3 DSP I/O Description 4.3.1 Multiplexed Pins Many of the CS48AU2B pins are multi-functional. For details on pin functionality please refer to the CS485xx Hardware User’s Manual. 4.3.
PAGE 10
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 5. Characteristics and Specifications Note: All data sheet minimum and maximum timing parameters are guaranteed over the rated voltage and temperature. All data sheet typical parameters are measured under the following conditions: T = 25 °C, CL = 20 pF, VDD = VDDA = 1.8 V, VDDIO = 3.3 V, GNDD = GNDIO = GNDA = 0 V. 5.
PAGE 11
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 5.
PAGE 12
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 5.6 Switching Characteristics— RESET Parameter Symbol Min Max Unit Trstl 1 - ms All bidirectional pins high-Z after RESET low Trst2z - 100 ns Configuration pins setup before RESET high Trstsu 50 - ns Configuration pins hold after RESET high Trsthld 20 - ns EN D TI EL A L PH D I RA FT RESET minimum pulse width low RESET HS[3:0] All Bidirectional Pins Trstsu Trsthld Trst2z Trstl Figure 1.
PAGE 13
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 5.8 Switching Characteristics — Internal Clock Parameter Internal DCLK frequency1 Symbol Min Max Fdclk Fxtal 150 6.7 1/Fxtal CS48AU2B-CQZ Internal DCLK period1 DCLKP CS48AU2B-CQZ Unit MHz ns C O N FI D EN D TI EL A L PH D I RA FT 1. After initial power-on reset, Fdclk = Fxtal. After initial kickstart commands, the PLL is locked to max Fdclk and remains locked until the next power-on reset.
PAGE 14
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 5.9 Switching Characteristics — Serial Control Port - SPI Slave Mode.
PAGE 15
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 5.
PAGE 16
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 5.11 Switching Characteristics — Serial Control Port - I2C Slave Mode Parameter Symbol Min Max Units SCP_CLK frequency fiicck - 400 kHz SCP_CLK low time tiicckl 1.25 - µs SCP_CLK high time tiicckh 1.25 - µs tiicckcmd 1.25 START condition to SCP_CLK falling tiicstscl 1.25 - µs SCP_CLK falling to STOP condition tiicstp 2.
PAGE 17
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 5.12 Switching Characteristics — Serial Control Port - I2C Master Mode Parameter Symbol Min Max Units fiicck - 400 kHz SCP_CLK low time tiicckl 1.25 - µs SCP_CLK high time tiicckh 1.25 - µs tiicckcmd 1.25 START condition to SCP_CLK falling tiicstscl 1.25 - µs SCP_CLK falling to STOP condition SCP_CLK frequency1 SCP_SCK rising to SCP_SDA rising or falling for START or STOP condition µs 2.
PAGE 18
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 5.13 Switching Characteristics — Digital Audio Slave Input Port Parameter Symbol Min Max Unit Tdaiclkp 40 - ns - 45 55 % Setup time DAI_DATAn tdaidsu 10 - ns Hold time DAI_DATAn tdaidh 5 - ns DAI_SCLK period DAI_SCLK duty cycle EN D TI EL A L PH D I RA FT DAI_SCLK tdaidsu tdaidh DAI_DATAn Figure 7. Digital Audio Input (DAI) Port Timing Diagram 5.
PAGE 19
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 5.
PAGE 20
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology Figure 9. Digital Audio Output Port Timing, Master Mode tdaosstlr tdaosclk DAO_LRCLK DAO_LRCLK DAO_SCLK tdaosclk tdaoslrts EN D TI EL A L PH D I RA FT DAOn_DATAn DAO_SCLK tdaosdv Note: In these diagrams, Falling edge is the inactive edge of DAO_SCLK C O N FI D Figure 10.
PAGE 21
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 6. Ordering Information The CS48AU2B part number is described as follows: CS48AU2I-XYZR where I - ROM ID Number X - Product Grade Y - Package Type EN D TI EL A L PH D I RA FT Z - Lead (Pb) Free R - Tape and Reel Packaging Table 3. Ordering Information Part No. CS48AU2B-CQZ Grade Temp.
PAGE 22
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 7. Environmental, Manufacturing, & Handling Information Table 4. Environmental, Manufacturing, & Handling Information Model Number Peak Reflow Temp MSL Rating* Max Floor Life CS48AU2B-CQZ 260 °C 3 7 Days C O N FI D EN D TI EL A L PH D I RA FT * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020.
PAGE 23
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 8. Device Pinout Diagram GPIO4, DAO1_ DATA2, HS2 GPIO18, DAO_MCLK 26 25 GNDIO3 30 GPIO3, DAO1_ DATA1, HS1 GPIO6, DAO2 _DATA0, HS3 31 27 GPIO7, DAO2_D ATA1, HS4 32 VDD2 GND4 33 28 GPIO9, SCP_MOSI 34 GPIO5, DAO1_DATA3, X MTA GPIO10, SCP__MISO / SDA 35 CS48AU2B 42 10 11 12 GPIO16, DAI1_DATA0, TM0, DSD0 GPIO0, DAI1_DATA1, TM1, DSD1 VDDIO1 9 GND2 FI TEST N O 8 48 DAI1_SCLK, DSD-CLK VDDA (3.
PAGE 24
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 9. Package Mechanical Drawings 9.1 48-pin LQFP Package Drawing D Number of Leads 48 MIN NOM MAX 1.60 0.05 0.15 1.35 1.40 1.45 0.17 0.22 0.27 9.00 BSC 7.00 BSC 0.50 BSC 9.00 BSC 7.00 BSC 0 7 0.45 0.60 0.75 1.00 REF C O N FI A A1 A2 b D D1 e E E1 theta L L1 EN D TI EL A L PH D I RA FT 48 LD LQFP (7 x 7 x 1.
PAGE 25
CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 10. Revision History Revision Date Changes F1 December 2, 2008 Initial Release F2 February 16, 2009 Updated Section 5.5, adding Junction Temperature specification. F3 May 27, 2009 C O N FI D EN D TI EL A L PH D I RA FT Updated Note 1 in Section 5.7.
PAGE 26
C O N FI D EN D TI EL A L PH D I RA FT CS48AU2B Data Sheet Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology 26 Copyright 2009 Cirrus Logic CONFIDENTIAL DS876F3