Manual
Table Of Contents
- 1 Documentation Strategy
- 2 Overview
- 3 Code Overlays
- 4 Hardware Functional Description
- 5 Characteristics and Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 Recommended Operations Conditions
- 5.3 Digital DC Characteristics
- 5.4 Power Supply Characteristics
- 5.5 Thermal Data (48-pin LQFP)
- 5.6 Switching Characteristics-RESET
- 5.7 Switching Characteristics-XTI
- 5.8 Switching Characteristics-Internal Clock
- 5.9 Switching Characteristics-Serial Control Port-SPI Slave Mode
- 5.10 Switching Characteristics-Serial Control Port-SPI Master Mode
- 5.11 Switching Characteristics-Serial Control Port-I2C Slave Mode
- 5.12 Switching Characteristics-Serial Control Port-I2C Master Mode
- 5.13 Switching Characteristics-Digital Audio Slave Input Port
- 5.14 Switching Characteristics-DSD Slave Input Port
- 5.15 Switching Characteristics-Digital Audio Output (DAO) Port
- 6 Ordering Information
- 7 Environmental, Manufacturing, and Handling Information
- 8 Device Pinout Diagrams
- 9 Package Mechanical Drawings
- 10 Revision History
17 DS734F5
5.15 Switching Characteristics—Digital Audio Output (DAO) Port
Figure 5-10. Digital Audio Output Timing, Slave Mode (Relationship LRCLK to SCLK)
Table 5-2. Slave Mode (Output A0 Mode)
1
1.Slave mode is defined as DAO_SCLK, DAO_LRCLK driven by an external source.
Parameter Symbol Min Max Unit
DAO_SCLK active edge to DAO_LRCLK transition t
daosstlr
10 — ns
DAO_LRCLK transition to DAO_SCLK active edge t
daoslrts
10 — ns
DAO_Dx delay from DAO_SCLK inactive edge t
daosdv
—11ns
DAO_SCLK
DAO_LRCLK
DAOn_DATAn
t
daosstlr
t
daosclk
DAO_SCLK
DAO_LRCLK
t
daoslrts
t
daosdv
t
daosclk
Note: In these diagrams, Falling edge is the inactive edge of DAO_SCLK.