User`s manual

9-19 Copyright 2009 Cirrus Logic, Inc. DS734UM7
Pin Assignments
CS485xx Hardware User’s Manual
Table 9-11 shows the names and functions for each pin of the CS48520.
25 GPIO18 General Purpose Input/Output 1. DAO_MCLK 1. Audio Master Clock 3.3V (5V tol)
BiDi IN Y
26 GPIO4 General Purpose Input/Output 1. DAO1_DATA2
2. HS2
1. Digital Audio Output
2. Hardware Strap Mode Select
3.3V (5V tol)
BiDi IN Y
27 GPIO3 General Purpose Input/Output 1. DAO1_DATA1
2. HS1
1. Digital Audio Output
2. Hardware Strap Mode Select
3.3V (5V tol)
BiDi IN Y
28 VDDD2 Core power supply voltage 1.8V
PWR
29 GPIO5 General Purpose Input/Output 1. XMTA 1. S/PDIF Audio Output A 3.3V (5V tol)
BiDi IN Y
30 GNDIO3 I/O ground 0V
PWR
31 GPIO6 General Purpose Input/Output 1. DAO2_DATA0
2. HS3
1. Digital Audio Output
2. Hardware Strap Mode Select
3.3V (5V tol)
BiDi IN Y
32 GPIO7 General Purpose Input/Output 1. HS4 1. Hardware Strap Mode Select 3.3V (5V tol)
BiDi IN Y
33 GNDD4 Core ground 0V
PWR
34 GPIO9 General Purpose Input/Output 1. SCP_MOSI 1. SPI Mode Master Data Output/Slave Data
Input
3.3V (5V tol)
BiDi IN Y
35 GPIO10 General Purpose Input/Output 1. SCP_MISO
2. SCP_SDA
1. SPI Mode Master Data Input/Slave Data
Output
2. I
2
C Mode Master/Slave Data IO
3.3V (5V tol)
BiDi/OD IN Y
36 GPIO11 General Purpose Input/Output 1. SCP_CLK
1. SPI/I
2
C Control Port Clock
3.3V (5V tol)
BiDi/OD IN Y
37 VDDIO3 I/O power supply voltage 3.3V
PWR
38 GPIO8 General Purpose Input/Output 1. SCP_CS 1. SPI Chip Select 3.3V (5V tol)
BiDi IN Y
39 GPIO12 General Purpose Input/Output 1. SCP_IRQ 1. Serial Control Port Data Ready Interrupt
Request
3.3V (5V tol)
BiDi/OD IN Y
40 GNDIO4 I/O ground 0V
PWR
41 GPIO13 General Purpose Input/Output 1. SCP_BSY
2. EE_CS
1. Serial Control Port Input Busy
2. EEPROM Boot Chip Select.
3.3V (5V tol)
BiDI/OD IN Y
42 VDDD3 Core power supply voltage 1.8V
PWR
43 XTAL_OUT Buffered Reference Clock
Input/Crystal Oscillator Input
3.3V (5V tol)
BiDi
44 XTI Reference Clock Input/Crystal
Oscillator Input
3.3V (5V tol)
ANA
45 XTO Crystal Oscillator Output 3.3V
ANA
46 GNDA PLL ground 3.3V
PWR
47 PLL_REF_RES Current Reference Output for
PLL. Connect to resistor.
3.3V
ANA
48 VDDA PLL power. 3.3V
PWR
Table 9-11. Pin Assignments of CS48520
LQFP-48
Pin # Function 1
(Default)
Description of Default
Function
Secondary Functions
Description of Secondary Functions Pwr Type
Reset
State
Pullup
at
Reset
1 TEST Test 3.3V (5V tol)
IN
2 RESET Active Low Chip Reset 3.3V (5V tol)
IN
3 DBDA Debug Data 3.3V (5V tol)
BiDi IN Y
4 GNDD1 Core ground 0V
PWR
5 DBCK Debug Clock 3.3V (5V tol)
BiDi IN Y
6 DAI1_LRCLK PCM Audio Input Sample
Rate (Left/Right) Clock
3.3V (5V tol)
IN Y
7 GNDIO1 I/O ground 0V
PWR
8 DAI1_SCLK PCM Audio Input Bit Clock 3.3V (5V tol)
IN Y
9 GNDD2 Core ground 0V
PWR
10 GPIO16 General Purpose Input/Output 1. DAI1_DATA0 1. Digital Audio Input Data 3.3V (5V tol)
BiDi IN Y
Table 9-10. Pin Assignments of CS48540 (Continued)
LQFP-48
Pin # Function 1
(Default)
Description of Default
Function
Secondary Functions
Description of Secondary Functions Pwr Type
Reset
State
Pullup
at
Reset