User`s manual

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9-15 Copyright 2009 Cirrus Logic, Inc. DS734UM7

48-Pin LQFP Pin Assigments

CS485xx Hardware User’s Manual

Figure 9-11 shows the 48-Pin LQFP Pin Layout of the CS48540.

Figure 9-11. 48-Pin LQFP Pin Layout of CS48540

XTO

XTI

GNDA

PLL_REF_RES

VDDA (3.3V)

GPIO1, DAI1_DATA2

GPIO2

GPIO16, DAI1_DATA0

GPIO0, DAI1_DATA1

38

40

41

42

43

45

46

GPIO13, SCP_BSY#, EE_CS#

GPOI12, SCP_IRQ#

GPIO10, SCP__MISO / SDA

GPIO9, SCP_MOSI

GPIO11, SCP_CLK

35

33

31

30

28

26

25

GND4

GNDIO4

VDD3

GND3

VDDIO3

GNDIO3

23

22

21

19

17

15

1

GPIO5, XMTA

GPIO3, DAO1_ DATA1, HS1

DAO1_DATA0, HS0

DAO_LRCLK

DAI1_LRCLK

GPIO18, DAO_MCLK

DAI1_SCLK

VDD1

GND1

DAO_SCLK

GPIO4, DAO1_ DATA2, HS2

RESET#

VDDIO1

GNDIO1

GPIO6, DAO2_DATA0, HS3

GPIO7, HS4

VDD2GND2

VDDIO2

GNDIO2

2

3

4

5

6

7

9

10

11

12

GPIO8, SCP_CS#

TEST

DBDA

DBCK

XTAL_OUT GPIO15, DAI2_SCLK

GPIO14, DAI2_LRCLK

GPIO17,

DAI2

_D

A

T

A

0

CS48540

48 LQFP

8

13

14

16

18

20

24

27

29

32

34

36

37

39

44

47

48