User`s manual
DS734UM7 Copyright 2009 Cirrus Logic, Inc. 3-21
SPI Port
CS485xx Hardware User’s Manual
Figure 3-17. Sample Waveform for SPI Write Functional Timing
Figure 3-18. Sample Waveform for SPI Read Functional Timing
Notes: 1.IRQ remains low until the rising edge of the clock for the last bit of the last byte to be read from the SPI slave.
2.After going high, IRQ remains high until the CS
signal is raised to end the SPI transaction. If there are more bytes to read, IRQ will fall
after CS
has gone high.
SCP_CLK
S
CP_MOSI Data Byte 3 (MSB)7-bit Address
R/W
Data Byte 2 Data Byte 1 Data Byte 0 (LSB)
SCP_CS
SCP_CLK
S
CP_MOSI
D a ta B y te 3 (M S B )
7-bit A ddress
R
/
W
D a ta B y te 2 D a ta B y te 1 D a ta B y te 0 (L S B )
SCP_CS
S
CP_MISO
SCP_IRQ