Owner's manual

DS787PP9 32
11 Revision History
11 Revision History
Revision Date Changes
PP1 August, 2009 Updated Characterization data in Section 5.4, Section 5.7, Section 5.9, Section 5.11, Section 5.12,
Section 5.16.1, Section 5.16.2, Section 5.16.3, Section 5.17.1, and Section 5.17.2. Modified Footnote 3 in
both Section 5.16.1 and Section 5.16.2. Added Footnote 5 to Section 5.14. Updated Section 2.1. Modified
Section 4.3.6 and Section 4.3.8. Modified references to TDM in various sections of the data sheet.
PP2 January, 2010 Updated TDM Feature description on page 1. Modified note at the bottom of the feature list on page 1.
Updated table in Section 5.8, specifying performance data for 2- and 4-layer boards. Updated Tab l e 3- 1 and
Table 3 - 2 Updated block diagrams in Fig. 4-1, Fig. 4-2, and Fig. 4-3.
PP3 June, 2010 Ta b l e 3-1 : Straddled all three columns in the “Supports Different Fs Sample Rates” row to indicate that
CS47024 devices have the same features as the CS47048 and CS47028.
Added “The CS47024 has the 8-channel SRC block” to Section 4.3.7.
Added text in the following places to indicate that the CS47024 implements the S/PDIF Rx functionality:
Removed dagger from the S/PDIF Rx bullet on p. 1.
Updated bullet in “Configurable Serial Audio Inputs/Outputs” row in Table 2 Integrated 192 kHz S/PDIF
Rx, 2 Integrated 192 kHz S/PDIF Tx.
Changed entry in “S/PDIF In (Stereo Pairs)” column in Tabl e 3-2.
Updated I2S block in Table 3-2.
Removed text “On the CS47048 and CS47028...” from Section 4.3.4.
Removed “(Not available on CS47024)” from the heading to Section 5.15.
Described additional support for TDM 8-channel output mode on CS47024.
Removed dagger from the TDM I/O bullet on p. 1.
Straddled “Configurable Serial Audio Inputs/Outputs” row in Table 3 - 1 .
Changed cell in “TDM Out” column in Table 3-2.
Removed text “On the CS47048 and CS47028...” from Section 4.3.5.
PP4 February, 2011 Added “Decoder” information to Section 3. Changed the name of the core to “Cirrus Logic 32-bit core”.
PP5 February, 2011 Added “SPDIF RX” to Fig. 5-17.
PP6 June, 2011 In Section 4.3.1 and Section 4.3.7, removed mention of 192 kHz sampling frequency. Updated temperature
operating conditions in Section 5.2. Updated pin 33 to XTAL_OUT, TEST in Fig. 8-1, Fig. 8-2, and Fig. 8-3.
PP7 April, 2012 Corrected peak reflow temperature in Table 7 - 1 .
PP8 June, 2012 Added number of bits to Integrated DAC and ADC Functionality on the cover page.
PP9 July, 2012 Updated frequencies in Section 5.2. Added extended automotive grade information to Section 6 and
Section 7.