User guide

CS4392
DS459PP3 33
SWITCHING SPECIFICATIONS - DSD INTERFACE (Logic 0 = AGND; Logic 1 = VL)
Parameter Symbol Min Max Unit
MCLK Duty Cycle 40 60 %
DSD_SCLK Pulse Width Low t
sclkl
20 - ns
DSD_SCLK Pulse Width High t
sclkh
20 - ns
DSD_SCLK Period t
sclkw
20
-ns
DSD_L or DSD_R valid to DSD_SCLK rising setup time t
sdlrs
20 - ns
DSD_SCLK rising to DSD_L or DSD_R hold time t
sdh
20 - ns
sclkh
t
sclkl
t
DSD_L, DSD_R
DSD_SCLK
sdlrs
t
sdh
t
Figure 37. Direct Stream Digital - Serial Audio Input Timing