User Manual

DS671F2 29
CS4385
4.9 Grounding and Power Supply Arrangements
As with any high-resolution converter, the CS4385 requires careful attention to power supply and grounding
arrangements if its potential perfor mance is to be realized . The Typical Connection Dia gram shows the rec-
ommended power arrangements, with VA, VD, VLC, and VLS connected to clean supplies. If the ground
planes are split between d igital ground and analo g ground, the GND pins of the CS4385 should be connect-
ed to the analog ground plane.
All signals, especially clocks, should be kept away from the FILT+ and VQ pins in order to avoid unwanted
coupling into the DAC.
4.9.1 Capacitor Placement
Decoupling capacitors should be placed as close to the DAC as possible, with the low value ceramic ca-
pacitor being the closest. To further minimize impedance, these capacitors should b e located on the same
layer as the DAC. If desired, all supply pins with similar voltage ratings may be connected to the same
supply, but a decoupling capacitor should still be placed on each supply pin.
Notes: All decoupling cap acitors should be referenced to ground.
The CDB4385 evaluation board demonstrates the optimum layout and power supply arrangements.
4.10 Analog Output and Filtering
The application note “Design Notes for a 2-Pole Filter with Differential Input” discusses the second-order
Butterworth filter and differential to single-ended converter which was implemented on the CS4385 evalua-
tion board, CDB4385, as seen in Figure 24. The CS4385 does not include phase or amplitude compensa-
tion for an external filter. Therefore, the DAC system phase and amplitude response will be dependent on
the external analog circuitry. The off-chip filter has been designed to at tenuate the ty pical full-scale outp ut
level to below 2 Vrms.
Figure 23 shows how the full-scale differential analog output level specification is derived.
AOUT+
AOUT-
Full-Scale Output Level= (AOUT+) - (AOUT-)= 6.6 Vpp
4.15 V
2.5 V
0.85 V
4.15 V
2.5 V
0.85 V
Figure 23. Full-Scale Output