Manual

38 DS514F2
CS4382
LRCK
SCLK
Left Channel
Right Channel
SDINx
6543210987
15 14 13 12 11 10
10
6543210987
15 14 13 12 11 10
17 16 17 16
32 clocks
19 18 19 18
Figure 37. Format 4 - Right Justified 20-bit Data
LRCK
SCLK
Left Channel
Right Channel
SDINx
6543210987
15 14 13 12 11 10
10
6543210987
15 14 13 12 11 10
17 16 17 16
32 clocks
Figure 38. Format 5 - Right Justified 18-bit Data
Figure 39. De-Emphasis Curve
Gain
dB
-10dB
0dB
Frequency
T2 = 15 µs
T1=50 µs
F1 F2
3.183 kHz 10.61 kHz
SDINx
Channel
Pair x
Control
DAC
DAC
AOUTAx+
AOUTAx-
AOUTBx+
AOUTBx-
L
R
Figure 40. Channel Pair Routing Diagram (x = Channel Pair 1, 2, 3, or 4)