User Manual
Table Of Contents
- 1. Pin Description
- 2. Characteristics and Specifications
- Recommended Operating Conditions
- Absolute Maximum Ratings
- DAC Analog Characteristics
- Power and Thermal Characteristics
- Combined Interpolation & On-Chip Analog Filter Response
- Combined Interpolation & On-Chip Analog Filter Response
- DSD Combined Digital & On-Chip Analog Filter Response
- Digital Characteristics
- Switching Characteristics - PCM
- Switching Characteristics - DSD
- Switching Characteristics - Control Port - I·C Format
- Switching Characteristics - Control Port - SPI Format
- 3. Typical Connection Diagram
- 4. Applications
- 4.1 Master Clock
- 4.2 Mode Select
- 4.3 Digital Interface Formats
- Figure 8. Format 0 - Left-Justified up to 24-bit Data
- Figure 9. Format 1 - I·S up to 24-bit Data
- Figure 10. Format 2 - Right-Justified 16-bit Data
- Figure 11. Format 3 - Right-Justified 24-bit Data
- Figure 12. Format 4 - Right-Justified 20-bit Data
- Figure 13. Format 5 - Right-Justified 18-bit Data
- 4.3.1 OLM #1
- 4.3.2 OLM #2
- 4.4 Oversampling Modes
- 4.5 Interpolation Filter
- 4.6 De-Emphasis
- 4.7 ATAPI Specification
- 4.8 Direct Stream Digital (DSD) Mode
- 4.9 Grounding and Power Supply Arrangements
- 4.10 Analog Output and Filtering
- 4.11 The MUTEC Outputs
- 4.12 Recommended Power-Up Sequence
- 4.13 Recommended Procedure for Switching Operational Modes
- 4.14 Control Port Interface
- 4.15 Memory Address Pointer (MAP)
- 5. Register Quick Reference
- 6. Register Description
- 6.1 Chip Revision (Address 01h)
- 6.2 Mode Control 1 (Address 02h)
- 6.3 PCM Control (Address 03h)
- 6.4 DSD Control (Address 04h)
- 6.5 Filter Control (Address 05h)
- 6.6 Invert Control (Address 06h)
- 6.7 Group Control (Address 07h)
- 6.8 Ramp and Mute (Address 08h)
- 6.9 Mute Control (Address 09h)
- 6.10 Mixing Control (Address 0Ah, 0Dh, 10h, 13h)
- 6.11 Volume Control (Address 0Bh, 0Ch, 0Eh, 0Fh, 11h, 12h)
- 6.12 PCM Clock Mode (Address 16h)
- 7. Filter Response Plots
- Figure 24. Single-Speed (fast) Stopband Rejection
- Figure 25. Single-Speed (fast) Transition Band
- Figure 26. Single-Speed (fast) Transition Band (detail)
- Figure 27. Single-Speed (fast) Passband Ripple
- Figure 28. Single-Speed (slow) Stopband Rejection
- Figure 29. Single-Speed (slow) Transition Band
- Figure 30. Single-Speed (slow) Transition Band (detail)
- Figure 31. Single-Speed (slow) Passband Ripple
- Figure 32. Double-Speed (fast) Stopband Rejection
- Figure 33. Double-Speed (fast) Transition Band
- Figure 34. Double-Speed (fast) Transition Band (detail)
- Figure 35. Double-Speed (fast) Passband Ripple
- Figure 36. Double-Speed (slow) Stopband Rejection
- Figure 37. Double-Speed (slow) Transition Band
- Figure 38. Double-Speed (slow) Transition Band (detail)
- Figure 39. Double-Speed (slow) Passband Ripple
- Figure 40. Quad-Speed (fast) Stopband Rejection
- Figure 41. Quad-Speed (fast) Transition Band
- Figure 42. Quad-Speed (fast) Transition Band (detail)
- Figure 43. Quad-Speed (fast) Passband Ripple
- Figure 44. Quad-Speed (slow) Stopband Rejection
- Figure 45. Quad-Speed (slow) Transition Band
- Figure 46. Quad-Speed (slow) Transition Band (detail)
- Figure 47. Quad-Speed (slow) Passband Ripple
- 8. References
- 9. Parameter Definitions
- 10. Package Dimensions
- 11. Ordering Information
- 12. Revision History
DS619F1 3
CS4364
6.3 PCM Control (Address 03h) .......................................................................................................... 34
6.3.1 Digital Interface Format (DIF)............................................................................................... 34
6.3.2 Functional Mode (FM) .......................................................................................................... 35
6.4 DSD Control (Address 04h)........................................................................................................... 35
6.4.1 DSD Mode Digital Interface Format (DSD_DIF) .................................................................. 35
6.4.2 Direct DSD Conversion (DIR_DSD)..................................................................................... 36
6.4.3 Static DSD Detect (STATIC_DSD) ...................................................................................... 36
6.4.4 Invalid DSD Detect (INVALID_DSD).................................................................................... 36
6.4.5 DSD Phase Modulation Mode Select (DSD_PM_MODE).................................................... 36
6.4.6 DSD Phase Modulation Mode Enable (DSD_PM_EN) ........................................................ 36
6.5 Filter Control (Address 05h) .......................................................................................................... 37
6.5.1 Interpolation Filter Select (FILT_SEL).................................................................................. 37
6.6 Invert Control (Address 06h) ......................................................................................................... 37
6.6.1 Invert Signal Polarity (INV_xx) ............................................................................................. 37
6.7 Group Control (Address 07h) ........................................................................................................ 37
6.7.1 Mute Pin Control (MUTEC1, MUTEC0) ............................................................................... 37
6.7.2 Channel A Volume = Channel B Volume (Px_A=B)............................................................. 37
6.7.3 Single Volume Control (SNGLVOL) ..................................................................................... 38
6.8 Ramp and Mute (Address 08h) ..................................................................................................... 38
6.8.1 Soft Ramp and Zero Cross Control (SZC) ........................................................................... 38
6.8.2 Soft Volume Ramp-Up After Error (RMP_UP) ..................................................................... 39
6.8.3 Soft Ramp-Down Before Filter Mode Change (RMP_DN) ................................................... 39
6.8.4 PCM Auto-Mute (PAMUTE) ................................................................................................. 39
6.8.5 DSD Auto-Mute (DAMUTE) ................................................................................................. 39
6.8.6 MUTE Polarity and DETECT (MUTEP1:0)........................................................................... 40
6.9 Mute Control (Address 09h) .......................................................................................................... 40
6.9.1 Mute (MUTE_xx) .................................................................................................................. 40
6.10 Mixing Control (Address 0Ah, 0Dh, 10h, 13h) ............................................................................. 40
6.10.1 De-Emphasis Control (PX_DEM1:0).................................................................................. 40
6.10.2 ATAPI Channel Mixing and Muting (ATAPI) ...................................................................... 41
6.11 Volume Control (Address 0Bh, 0Ch, 0Eh, 0Fh, 11h, 12h)........................................................... 42
6.11.1 Digital Volume Control (xx_VOL7:0) .................................................................................. 42
6.12 PCM Clock Mode (Address 16h) ................................................................................................. 42
6.12.1 Master Clock Divide by 2 Enable (MCLKDIV).................................................................... 42
7. FILTER RESPONSE PLOTS ............................................................................................................... 43
8. REFERENCES...................................................................................................................................... 47
9. PARAMETER DEFINITIONS................................................................................................................ 47
10. PACKAGE DIMENSIONS .................................................................................................................. 48
11. ORDERING INFORMATION .............................................................................................................. 49
12. REVISION HISTORY ......................................................................................................................... 50