Manual

DS257F2 27
CS4362
*Note: These modes are only available in Control Port Mode by setting the MCLKDIV bit = 1.
Mode
(sample-rate range)
Sample
Rate
(kHz)
MCLK (MHz)
Control Port
Only Modes
MCLK Ratio 256x 384x 512x 768x 1024x*
Single-Speed
(4 to 50 kHz)
32 8.1920 12.2880 16.3840 24.5760 32.7680
44.1 11.2896 16.9344 22.5792 33.8688 45.1584
48 12.2880 18.4320 24.5760 36.8640 49.1520
MCLK Ratio 128x 192x 256x 384x 512x*
Double-Speed
(50 to 100 kHz)
64 8.1920 12.2880 16.3840 24.5760 32.7680
88.2 11.2896 16.9344 22.5792 33.8688 45.1584
96 12.2880 18.4320 24.5760 36.8640 49.1520
MCLK Ratio 64x 96x 128x 192x 256x*
Quad-Speed
(100 to 200 kHz)
176.4 11.2896 16.9344 22.5792 33.8688 45.1584
192 12.2880 18.4320 24.5760 36.8640 49.1520
Table 5. Common Clock Frequencies
M1
(DIF1)
M0
(DIF0)
DESCRIPTION FORMAT FIGURE
00
Left Justified, up to 24-bit data
033
01
I
2
S, up to 24-bit data
134
10
Right Justified, 16-bit Data
235
11
Right Justified, 24-bit Data
336
Table 6. Digital Interface Format, Stand-Alone Mode Options
M3
M2
(DEM)
DESCRIPTION
00
Single-Speed without De-Emphasis (4 to 50 kHz sample rates)
01
Single-Speed with 44.1 kHz De-Emphasis; see Figure 39
10
Double-Speed (50 to 100 kHz sample rates)
11
Quad-Speed (100 to 200 kHz sample rates)
Table 7. Mode Selection, Stand-Alone Mode Options
DSD_Mode
(LRCK1)
M2 M1 M0 DESCRIPTION
1 000
64x oversampled DSD data with a 4x MCLK to DSD data rate
1 001
Reserved
1 010
Reserved
1 011
Reserved
1 100
128x oversampled DSD data with a 2x MCLK to DSD data rate
1 101
Reserved
1 110
Reserved
1 111
Reserved
Table 8. Direct Stream Digital (DSD), Stand-Alone Mode Options